CY7C261-20WXC Cypress Semiconductor Corp, CY7C261-20WXC Datasheet - Page 5

• Manufacturer Part Number: CY7C261-20WXC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C261-20WXC

• Density: 64Kb
• Organization: 8Kx8
• Access Time (max): 20ns
• Operating Current: 120mA
• Interface Type: Parallel
• Package Type: Windowed CDIP
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (typ): 5V
• Operating Temp Range: 0C to 70C
• Pin Count: 24
• Mounting: Through Hole
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Lead Free Status / RoHS Status: Compliant

Document #: 38-04010 Rev. *C
Switching Waveforms
Erasure Characteristics
Wavelengths of light less than 4000 angstroms begin to erase
the devices in the windowed package. For this reason, an
opaque label should be placed over the window if the PROM
is exposed to sunlight or fluorescent lighting for extended
periods of time.
The recommended dose of ultraviolet light for erasure is a
wavelength of 2537 angstroms for a minimum dose (UV
intensity multiplied by exposure time) of 25 Wsec/cm
ultraviolet lamp with a 12 mW/cm
would be approximately 35 minutes. The 7C261 or 7C263
needs to be within 1 inch of the lamp during erasure.
Permanent damage may result if the PROM is exposed to
high-intensity UV light for an extended period of time. 7258
Wsec/cm
Table 1. Mode Selection
Notes
6. X = “don’t care” but not to exceed V
7. Addresses A
Read
Output Disable
Program
Program Inhibit
Program Verify
Blank Check
Mode
CURRENT
ADDRESS
A
O
SUPPLY
0
0
- A
- O
V
2
Read or Output Disable
CS
CC
12
is the recommended maximum dosage.
7
8
-A
12
Program
must be latched through lines A
[4]
2
CC
power rating, the exposure time
±5%.
t
AA
V
V
V
V
A
NA
A
A
0
-A
ILP
ILP
ILP
ILP
12
12
12
4
in programming modes.
V
V
V
V
V
A
A
A
PP
PP
PP
PP
PP
11
11
11
2
. For an
t
t
PD
HZCS
LATCH
50%
V
V
V
V
A
A
A
Operating Modes
Read
Read is the normal operating mode for programmed device. In
this mode, all signals are normal TTL levels. The PROM is
addressed with a 13-bit field, a chip select, (active LOW), is
applied to the CS pin, and the contents of the addressed location
appear on the data out pins.
Program, Program Inhibit, Program Verify
These modes are entered by placing a high voltage V
19, with pins 18 and 20 set to V
latch signal, allowing the upper 5 address bits to be latched into an
onboard register, pin 22 becomes an active LOW program (PGM)
signal and pin 23 becomes an active LOW verify (VFY) signal. Pins
22 and 23 should never be active LOW at the same time. The
PROGRAM mode exists when PGM is LOW, and VFY is HIGH. The
verify mode exists when the reverse is true, PGM HIGH and VFY
LOW and the program inhibit mode is entered with both PGM and
VFY HIGH. Program inhibit is specifically provided to allow data to be
placed on and removed from the data pins without conflict
ILP
ILP
ILP
ILP
10
10
10
Pin Function
PGM
V
V
V
V
A
A
A
IHP
IHP
IHP
ILP
9
9
9
[6, 7]
t
t
PU
ACS
50%
VFY
V
V
V
V
A
A
A
IHP
IHP
ILP
ILP
8
8
8
CY7C263/CY7C264
ILP
. In this state, pin 21 becomes a
V
V
V
V
CS
CS
V
V
ILP
ILP
ILP
ILP
IH
IL
CY7C261
Page 5 of 14
O
D
High Z
High Z
O
D
O
O
7
7
7
7
7
7
–O
–D
–O
–D
–O
–O
PP
0
0
0
0
0
0
on pin