ISD4004-08MEYDR Nuvoton Technology Corporation of America, ISD4004-08MEYDR Datasheet - Page 10
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ISD4004-08MEYDR
Manufacturer Part Number
ISD4004-08MEYDR
Description
Manufacturer
Nuvoton Technology Corporation of America
Datasheet
1.ISD4004-08MEYDR.pdf
(38 pages)
Specifications of ISD4004-08MEYDR
Lead Free Status / RoHS Status
Compliant
PIN NAME
XCLK
SCLK
SOIC /
PDIP
26
28
PIN NO.
TSOP
6
8
External Clock Input: The pin has an internal pull-down
device. The ISD4004 series is configured at the factory with
an internal sampling clock frequency centered to ±1
percent of specification. The frequency is then maintained
to a variation of ±2.25 percent over the entire commercial
temperature and operating voltage ranges. The internal
clock has a –6/+4 percent tolerance over the extended
temperature, industrial temperature and voltage ranges. A
regulated power supply is recommended for industrial
temperature range parts. If greater precision is required,
the device can be clocked through the XCLK pin as follows:
These recommended clock rates should not be varied
because the anti-aliasing and smoothing filters are fixed.
Otherwise, aliasing problems can occur if the sample rate
differs from the one recommended. The duty cycle on the
input clock is not critical, as the clock is immediately
divided by two. If the XCLK is not used, this input must
be connected to ground.
Serial Clock: This is the input clock to the ISD4004 device.
It
microcontoller) and is used to synchronize the data transfer
in and out of the device through the MOSI and MISO lines,
respectively. Data is latched into the ISD4004 on the rising
edge of SCLK and shifted out of the device on the falling
edge of SCLK.
is
ISD4004-08M
ISD4004-10M
ISD4004-12M
ISD4004-16M
- 10 -
Part Number
generated
by
Sample Rate
FUNCTION
8.0 kHz
6.4 kHz
5.3 kHz
4.0 kHz
the
ISD4004 SERIES
master
Required Clock
device
819.2 kHz
682.7 kHz
1024 kHz
512 kHz
(typically