WP413812 S LAMU Intel, WP413812 S LAMU Datasheet - Page 38

• Manufacturer Part Number: WP413812 S LAMU
• Manufacturer: Intel

Specifications of WP413812 S LAMU

• Lead Free Status / RoHS Status: Compliant

F i g u r e 5 .
I n t e l
D a t a s h e e t
3 8
®
4 1 3 8 0 8 a n d I n t e l
I n t e l
B a l l o u t — P a c k a g e B o t t o m ( L e f t S i d e )
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
10
11
9
8
7
6
5
4
3
2
1
smbdat
vcc1p8 vcc1p8 vcc1p8 vcc1p8 vcc1p8 vcc1p8 vcc1p8 vcc1p8 vcc1p8 vcc1p8 vcc1p8 vcc1p8 vcc1p8 vcc1p8 vcc1p8 vcc1p8 vcc1p8 vcc1p8 vcc1p8
smbclk
vcc1p2
vcc1p8
perp[7] pern[7] petp[7] petn[7]
perp[6] pern[6] petp[6] petn[6]
perp[5] pern[5] petp[5] petn[5]
perp[4] pern[4] petp[4] petn[4]
perp[3] pern[3] petp[3] petn[3]
perp[2] pern[2] petp[2] petn[2]
perp[1] pern[1] petp[1] petn[1]
perp[0] pern[0] petp[0] petn[0]
vcc1p2 vcc1p2 vcc1p2 vcc1p2 vcc1p2 vcc1p2 vcc1p2
®
vsse
vsse
vsse
vsse
vsse
a[22]
a[13]
a[14]
trst#
vss
vss
vss
a[6]
a[2]
a[7]
a[5]
d[1]
vss
AU
tdi
e
x
4 1 3 8 1 2 S A S / S A T A I / O C o n t r o l l e r s i n T P E R M o d e
®
4 1 3 8 0 8 a n d I n t e l
vcc1p2
vcc1p8
a[18]
vsse
vsse
vsse
vsse
vsse
vss
vss
vss
tms
scl0
vss
vss
a[8]
a[1]
vss
a[3]
a[4]
d[8]
d[0]
vss
AT
nc
nc
x
e
vcc1p2
vcc1p8
pce#[0]
rstout#
sda1
sda0
a[19]
a[12]
a[15]
a[17]
a[23]
vsse
vsse
vsse
vsse
vsse
pb_
d[4]
d[3]
a[0]
AR
vss
vss
tdo
vss
nc
nc
nc
tck
x
e
vcc3p3 vcc3p3 vcc3p3 vcc1p2
vcc1p2
vcc1p8
sda2
vsse
vsse
vsse
vsse
vsse
a[21]
a[10]
a[16]
d[11]
d[13]
vss
vss
vss
a[9]
vss
d[9]
vss
d[5]
AP
nc
nc
nc
nc
nc
e
x
pce#[1] vcc3p3
vcc3p3 vcc3p3
vcc1p2
vcc1p8
vcc1p8
vcc1p8
vcc1p8
vcc1p8
vcc1p8
vcc1p8
vcc1p8
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc3p3
pe_cal
pe_cal
PUR1 vcc3p3 vcc1p2
a[20]
a[11]
d[15]
d[12]
scl1
scl2
d[2]
d[6]
d[7]
AN
nc
nc
nc
nc
nc
nc
x
e
e
e
e
e
e
p
n
e
e
e
e
e
e
vcc3p3
vcc3p3 vcc1p2
vcc1p2
vcc1p8
vcc1p8
vcc1p2
vcc1p2
vcc3p3 vcc1p2
vcc3p3
vcc3p3
vcc3p3 vcc3p3 vccvio
p2ae
p2ae
p2ae
p2ae
p2ae
p2ae
p2ae
p2ae
d[10]
poe#
pwe#
d[14]
a[24]
vcc1
vcc1
vcc1
vcc1
vcc1
vcc1
vcc1
vcc1
AM
vss
vss
nc
nc
nc
nc
nc
x
e
e
e
e
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
p_ad[3
p_ad[3
p_ad[3
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
AL
nc
nc
nc
nc
nc
nc
2]
4]
3]
x
x
x
x
x
®
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
refclkp vcc1p2
refclkn
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
p_ad[3
p_ad[3
p_ad[3
p_ad[3
vccvio
4 1 3 8 1 2 S A S / S A T A I / O C o n t r o l l e r s i n T P E R M o d e
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
AK
nc
nc
nc
nc
nc
6]
8]
5]
7]
x
x
x
x
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
p_ad[4
p_ad[4
p_ad[3
p_ad[4
p_ad[4
vccvio vcc3p3 vccvio
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
AJ
nc
nc
nc
0]
2]
9]
1]
3]
x
x
x
x
x
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
p_ad[4
p_ad[4
p_ad[4
AH
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
nc
nc
nc
4]
6]
5]
x
x
x
x
x
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
p_ad[4
p_ad[5
p_ad[4
p_ad[4
vccvio
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
AG
nc
nc
nc
nc
nc
8]
0]
7]
9]
x
x
x
x
x
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
p_ad[5
p_ad[5
p_ad[5
p_ad[5
p_ad[5
vccvio vcc3p3 vccvio
AF
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
nc
nc
nc
nc
nc
2]
4]
1]
3]
5]
x
x
x
x
x
I n t e l
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
p_ad[5
p_ad[5
p_ad[5
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
AE
nc
nc
nc
6]
8]
7]
x
x
x
x
x
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
p_ad[6
p_ad[6
p_ad[5
p_ad[6
p2plld vssplld
vccvio
vcc1
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
®
AD
nc
nc
nc
nc
0]
2]
9]
1]
x
x
x
x
4 1 3 8 0 8 a n d 4 1 3 8 1 2 — P a c k a g e I n f o r m a t i o n
cbe#[5]
cbe#[6]
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
p_par6
p_ad[6
vccvio vcc3p3 vccvio vccvio vcc3p3
cbe#[
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
AC
nc
nc
nc
nc
nc
p_
p_
p_
3]
4]
x
x
x
x
x
4
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
cbe#[7] vccvio
p_req6
ack64#
AB
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
nc
nc
nc
p_
4#
p_
x
x
x
x
x
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
p_ad[0
p_ad[2
p_ad[1
p_ad[3
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
AA
nc
nc
nc
nc
nc
x
x
x
x
x
]
]
]
]
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
p_ad[4
p_ad[6
p_ad[5
p_ad[7
p_ad[8
p3pllx
vcc3
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
nc
nc
nc
nc
Y
x
x
x
x
]
]
]
]
]
O r d e r N u m b e r : 3 1 5 8 0 6 - 0 0 1 U S
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
vcc1p2
p_ad[9
cbe#[0]
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
vss
nc
nc
nc
nc
nc
p_
W
x
x
x
x
x
]
O c t o b e r 2 0 0 7