JG82845 S L8D8 Intel, JG82845 S L8D8 Datasheet - Page 84

• Manufacturer Part Number: JG82845 S L8D8
• Manufacturer: Intel

Specifications of JG82845 S L8D8

• Lead Free Status / RoHS Status: Compliant

Register Description
3.6.5
3.6.6
3.6.7
84
RID1—Revision Identification Register (Device 1)
Address Offset:
Default Value:
Access:
Size:
This register contains the revision number of the MCH device 1. These bits are read only and
writes to this register have no effect.
SUBC1—Sub-Class Code Register (Device 1)
Address Offset:
Default Value:
Access:
Size:
This register contains the Sub-Class Code for the MCH device 1.
BCC1—Base Class Code Register (Device 1)
Address Offset:
Default Value:
Access:
Size:
This register contains the Base Class Code of the MCH device 1.
Bit
7:0
Bit
7:0
Bit
7:0
Revision Identification Number (RID): This is an 8-bit value that indicates the revision
identification number for the MCH device 1.
03h = A3 Stepping
04h = B0 Stepping
Sub-Class Code (SUBC1): This is an 8-bit value that indicates the category of bridge of the
MCH.
04h = Host bridge.
Base Class Code (BASEC): This is an 8-bit value that indicates the Base Class Code for the
MCH device 1.
06h = Bridge device.
08h
See RID1 table below
RO
8 bits
0Ah
04h
RO
8 bits
0Bh
06h
RO
8 bits
Description
Description
Description
Intel
®
82845 MCH for SDR Datasheet
R