LM93CIMTX National Semiconductor, LM93CIMTX Datasheet - Page 26

• Manufacturer Part Number: LM93CIMTX
• Manufacturer: National Semiconductor

Specifications of LM93CIMTX

• Operating Temperature (max): 85C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Package Type: TSSOP
• Mounting: Surface Mount
• Pin Count: 56
• Lead Free Status / RoHS Status: Not Compliant

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14.0 SMBus Interface
Whenever the low byte of a 16-bit register is written, the write
is buffered and does not take effect until the corresponding
high byte is written. If the low byte of a different 16-bit
register is written, the previously buffered low byte of the first
register is discarded. If a device attempts to write the high
byte of a 16-bit register, and the corresponding low byte was
not written (or was discarded), then the LM93 will NACK the
byte.
15.0 Using The LM93
15.1 POWER ON
The LM93 generates a power on reset signal on RESET
when power is applied for the first time to the part.
15.2 RESETS
Upon power up, the RESET output is asserted when the
voltage on the power supply crosses the power-on-reset
threshold level (see Electrical Specifications). The RESET
output is open-drain and should be used with an external
pull-up resistor connected to V
has completed, the RESET pin becomes an input and when
asserted causes the LOCK bit in the LM93 Configuration
register to be cleared. In addition, assertion of RESET
causes the sleep control register to be automatically set to
S4/S5. This causes several error events to be masked ac-
cording to the S4/S5 masking definitions.
15.4 DEVICE SETUP
BIOS executes the following steps to configure the registers
in the LM93. All steps may not be necessary if default values
are acceptable.
Set limits and parameters (not necessarily in this order):
Factory regs
Set up Fan control
Set up PWM temperature bindings
Set fan tach limits
Set fan boost temperature and hysteresis
Set the VRD_HOT and PROCHOT PWM ramp control
rate
Enable Smart Tach Mode and Tachometer Input to PWM
binding (required with direct PWM drive of fans)
Set the temperature absolute limits
Set the temperature hysteresis values
Set temperature filtered or unfiltered usage
Set the Zone Adjustment Offset temperature
Set the PROCHOT override and time interval values
Set the PROCHOT user limit
Enable THERMTRIP masking of error events (if GPIO4
and GPIO5 are used as THERMTRIP inputs)
greater-than 90% of V
less-than 10% of V
Address Select
Register Types
≈ V
DD
/2
DD
DD
DD
. Once the power on reset
On Reset
Power
(Continued)
x
10 kΩ (5%) Resistor to 3.3V SB V
Pulled to 3.3V SB V
Pulled to ground through a 10 kΩ resistor
External
Reset
Board Implementation
26
DD
through a 10 kΩ resistor
All other registers are not effected by power on reset or
external reset.
15.3 ADDRESS SELECTION
LM93 is designed to be used primarily in dual processor
server systems that may require only one monitoring device.
If multiple LM93 devices are implemented in a system, they
must have unique SMBus slave addresses. See the Section
14.1 SMBUS ADDRESSING for more information.
The board designer may apply a 10 kΩ pull-down and/or
pull-up resistors to ground and/or to 3.3V SB V
ADDR_SEL pin. The LM93 is designed to work with resistors
of 5% tolerance for the case where two resistors are re-
quired. Upon the first SMBus communication to the part, the
LM93 assigns itself an SMBus address according to the
ADDR_SEL input.
15.5 ROUND ROBIN VOLTAGE/TEMPERATURE
CONVERSION CYCLE
The LM93 monitoring function is started as soon as the part
is powered up. The LM93 performs a “round robin” sampling
of the inputs, in the order shown below. Each cycle of the
round robin is completed in less than 100 ms.
The results of the sampling and conversions can be found in
the value registers and are available at any time.
BMC Error Status regs
Host Error Status regs
Value regs
Limit regs
Setup regs
LM93 Configuration Lock Bit
LM93 Configuration GMSK Bit
Sleep Mask
Sleep State Control
Other Mask regs
Set voltage sensor limits and hysteresis
Set the Dynamic Vccp offset limits
Set the Sleep State control and mask registers
Set Other Mask Registers (GPI Error, VRDx_HOT, SC-
SI_TERM, and dynamic Vccp limit checking)
Set start bit to select user values and unmask error events
Set the sleep state to 0
Set Lock bit to lock the limit and parameter registers
(optional)
DD
Register Types
and to Ground
On Reset
x (reset)
Power
x
x
x
x
x
x
x
SMBus Address
0101,100b
0101,110b
0101,101b
External
DD
x (set)
Reset
x
x
on the