MPC17C724EP Freescale, MPC17C724EP Datasheet
MPC17C724EP
Specifications of MPC17C724EP
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MPC17C724EP Summary of contents
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... Very Compact Size, Comes in 16-Terminal QFN Package ( Terminal Pitch: 0.5 mm) • Pb-Free Packaging Designated by Suffix Code EP MCU * This document contains certain information on a new product. Specifications and information herein are subject to change without notice. © Freescale Semiconductor, Inc., 2005. All rights reserved. MPC17C724EP/R2 = 0.5 Ω (Typical) 3.0 V 17C724 VDD VM ...
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... PSAVE IN2A IN2B LGND Figure 2. 17C724 Simplified Internal Block Diagram 17C724 2 INTERNAL BLOCK DIAGRAM PSAVE- Low- Voltage Shutdown H-Bridge 1 Level Shifter Control Predriver Logic H-Bridge 2 VM1 OUT1A OUT1B PGND1 VM2 OUT2A OUT2B PGND2 PGND2 Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... Input 12 IN2A Input 13 PSAVE Input 14 LGND Ground 15 PGND1 Ground 16 VDD Logic Notes 1. VM1 and VM2 are internally connected. 2. LGND, PGND1, and PGND2 are internally connected. Analog Integrated Circuit Device Data Freescale Semiconductor TERMINAL CONNECTIONS 1N1A 1 12 1N1B 11 2 OUT1A 3 10 VM1 Figure 3 ...
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... R ZAP ZAP Value Unit V - 0.3 to 6.0 - 0.3 to 6 400 mA 800 mA ± 2000 V ± 200 - 40 to 150 ° °C 150 maximum °C 169 °C/W 47 °C 260 = 1500 Ω), and the Machine Model Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... Power SAVE mode. 11 the sum of the current 375 mA DS(ON) SOURCE 14. Detection voltage is defined as when the output becomes high impedance after V Analog Integrated Circuit Device Data Freescale Semiconductor = VM = 3.0V, unless otherwise noted. Typical values noted reflect the DD Symbol MSTBY I V DDSTBY ...
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... VM = 3.0V, unless otherwise noted. Typical values noted reflect the DD Symbol Min f – – – – PLH – t PHL t V – DET DD Analog Integrated Circuit Device Data Typ Max Unit – 200 kHz µs – 1.0 (16) – 1.0 µs (16) µs 0.2 0.5 0.1 0.5 0.02 1.0 ms Freescale Semiconductor ...
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... X : Don’t care Notes 19. Terminal 13 (PSAVE) is pulled internal resistor. 20. When V is lower than V DET while low-voltage shutdown detection circuit is disabled. Analog Integrated Circuit Device Data Freescale Semiconductor TIMING DIAGRAMS PHL I M Timing Figure 5. Low-Voltage Detection Timing Table 5. Truth Table IN1B ...
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... PCB. LOGIC GROUND (LGND) LGND is the logic ground terminal and its current handling level is lower than the PGND. Table 5, Truth Table, page 7). Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... Figure 7). 3.0 V 3.0 V 3.0 V 17C724 OUT OUT OUT OUT GND Figure 7. CEMF Snubbing Techniques Analog Integrated Circuit Device Data Freescale Semiconductor TYPICAL APPLICATIONS 3.0 V 17C724 VDD VM OUT1A OUT1B IN1A OUT2A IN1B IN2A IN2B OUT2B PSAVE GND Figure 6. 17C724 Typical Application Diagram ...
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... PACKAGING PACKAGE DIMENSIONS For the most current package revision, visit www.freescale.com and perform a keyword search using the “98A” listed below. 17C724 10 PACKAGING PACKAGE DIMENSIONS EP (Pb-FREE) SUFFIX 16-TERMINAL QFN NON-LEADED PACKAGE 98ARL10566D ISSUE A Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... Analog Integrated Circuit Device Data Freescale Semiconductor EP (Pb-FREE) SUFFIX 16-TERMINAL QFN NON-LEADED PACKAGE 98ARL10566D ISSUE A PACKAGING PACKAGE DIMENSIONS 17C724 11 ...
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... REVISION HISTORY REVISION DATE DESCRIPTION OF CHANGES 2005 • Initial Release 2.0 17C724 12 REVISION HISTORY Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... Freescale Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “ ...