MC33982BPNAR2 Freescale, MC33982BPNAR2 Datasheet
MC33982BPNAR2
Specifications of MC33982BPNAR2
Related parts for MC33982BPNAR2
MC33982BPNAR2 Summary of contents
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... Enhanced -16V reverse polarity MCU Figure 1. 33982B Simplified Application Diagram Freescale Semiconductor, Inc. reserves the right to change the detail specifications, as may be required, to permit improvements in the design of its products. © Freescale Semiconductor, Inc., 2007-2009. All rights reserved. MC33982BPNA/R2 protection PWR ...
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... Low Detection Blanking Time 0.15ms–155ms Over-temperature Detection GND VPWR Over-voltage Protection Selectable Slew Rate Gate Drive Selectable Overcurrent Low Detection 15A–50A Open Load Detection Selectable Output Current Recopy 1/5400 or 1/40000 CSNS Analog Integrated Circuit Device Data Freescale Semiconductor HS ...
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... FS Output 6 FSI Input 7 CS Input 8 SCLK Input 9 SI Input 10 VDD Input Analog Integrated Circuit Device Data Freescale Semiconductor PIN CONNECTIONS GND 14 VPWR Figure 3. 33982B Pin Connections Formal Name This pin is used to output a current proportional to the high side output Output Current ...
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... This pin connects to the positive power supply and is the source input of Positive Power operational power for the device. Supply Protected high side power output to the load. Output pins must be High-Side Output connected in parallel for operation. page 15. Definition Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... Active clamp energy using single-pulse method (L = 16mH ESD1 testing is performed in accordance with the Human Body Model (HBM accordance with the Charge Device Model (CDM), Robotic (Czap = 4.0pF). Analog Integrated Circuit Device Data Freescale Semiconductor ELECTRICAL CHARACTERISTICS MAXIMUM RATINGS Symbol V PWR V ...
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... Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow Temperature and Moisture Sensitivity Levels (MSL www.freescale.com, search by part number [e.g. remove prefixes/suffixes and enter the core ID to view all orderable parts. (i.e. MC33xxxD enter 33xxx), and review parametrics. ...
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... This applies to all internal device logic that is supplied This applies when the under-voltage fault is not latched (IN = 0). 10. Source-Drain ON Resistance (Reverse Drain-to-Source ON Resistance) with negative polarity V Analog Integrated Circuit Device Data Freescale Semiconductor ≤ 5.5V, 6.0V ≤ V ≤ 27V, -40°C ≤ PWR = 25°C under nominal conditions, unless otherwise noted. ...
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... V 4.5 6.0 7 μA 30 – 100 μA V 2.0 3.0 4.0 Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... Input capacitance of SI, CS, SCLK, RST, and WAKE. This parameter is guaranteed by process monitoring but is not production tested. 17. The current must be limited by a series resistance when using voltages > 7.0V. 18. Pull-up current is with CS OPEN. CS has an active internal pull- Analog Integrated Circuit Device Data Freescale Semiconductor STATIC ELECTRICAL CHARACTERISTICS ≤ 5.5V, 6.0V ≤ V ≤ 27V, -40°C ≤ PWR = 25° ...
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... V/μs 0.8 2.0 4.0 V/μs 0.1 0.35 1.2 μs 1.0 18 100 μs 20 230 500 μ 200 – 300 – 3.5V. These parameters are PWR - 3. 0.5V. These PWR PWR = 0.5V with 0.5V with HS PWR Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... OFF and FSI floating. The values shown are for WDR setting of [00]. The accuracy of t watchdog timeouts. 25. low duration measured with outputs enabled and going to OFF or disabled condition. RST Analog Integrated Circuit Device Data Freescale Semiconductor DYNAMIC ELECTRICAL CHARACTERISTICS ≤ 5.5V, 6.0V ≤ V ≤ 27V, -40°C ≤ PWR = 25° ...
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... Max – – 300 – – 5.0 – 50 167 – – 167 – – 167 – 50 167 – – – – – – 50 – – 50 – – 145 – 65 145 – 65 105 . Analog Integrated Circuit Device Data Freescale Semiconductor Unit ns μ ...
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... OCL1 I Load OCL2 Current I OCL3 I OCL4 I OCL5 I OCL6 I OCL7 Figure 6. Overcurrent Low and High Detection Analog Integrated Circuit Device Data Freescale Semiconductor TIMING DIAGRAMS SR & SR RB_SLOW RB_FAST SRrB & SR RA_SLOW RA _FAST t Tdly(off) DLY_SLOW(OFF) Figure 4. Output Slew Rate and Time Delays t OCLx Figure 5 ...
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... Iocl0. VIH V IH VIL TCSB CS VIH 0 0.7VDD DD IH VIL Tlag LAG V VIH IH VIL TfSI FSI VIH V IH Don’t Care Valid V VIL IH VOH V OH VOL V OL VOH V OH VOL VOH OH VOL V OL Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... Depending on the resistance value, either the output is OFF or ON. When the FSI pin is connected to GND, the watchdog circuit and fail-safe Analog Integrated Circuit Device Data Freescale Semiconductor FUNCTIONAL DESCRIPTION INTRODUCTION Programming, control, and diagnostics are implemented via the Serial Peripheral Interface (SPI). A dedicated parallel input is available for alternate and pulse width modulation (PWM) control of the output ...
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... The VPWR pin is a backside surface mount tab of the package. pin of the device CS HIGH-SIDE OUTPUT (HS) This pin protects high side power output to the load. Output pins must be connected in parallel for operation. Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... This N-channel MOSFET with a 2mΩ RDS(ON), is self-protected and Analog Integrated Circuit Device Data Freescale Semiconductor Parallel Control Inputs MCU Interface and Output Control Figure 9. Functional Internal Block Diagram presents extended diagnostics in order to detect load disconnections and short-circuit fault conditions ...
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... RST with a series of limiting PWR Table 14. As long as the WD bit (D7 High-Side State Fail-Safe Mode Disabled HS OFF HS ON RST summarizes the various methods for supplied. In this state, the DD Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... If the output command is ON, then FS will remain at Logic [0]. The output must be turned OFF and ON again Analog Integrated Circuit Device Data Freescale Semiconductor FUNCTIONAL DEVICE OPERATION PROTECTION AND DIAGNOSIS FEATURES The pin will automatically return to Logic [1] when the ...
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... UV Disable UV Disable UV Enable IN∗∗∗ IN∗∗∗ (Falling or (Falling or (Rising VPWR) Rising VPWR) Rising VPWR) OFF OFF OFF OFF OFF OFF OFF OFF OFF fault is latched Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... OD7:OD0 relate to the first 8 bits of ordered fault and status data out of the device. of the device. Figure 10. Single 8-Bit Word SPI Communication Analog Integrated Circuit Device Data Freescale Semiconductor LOGIC COMMANDS AND REGISTERS stream of serial data is required on the SI pin, starting with D7 to D0. The internal registers of the 33982B are configured ...
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... Register address bits. Used to configure the inputs, outputs, and the device protection features and SO status content. Used to configure the inputs, outputs, and the device protection features and SO status content. Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... TEST Freescale Internal Use (Test Don’t care. DEVICE REGISTER ADDRESSING The following section describes the possible register addresses and their impact on device operation. Address x000 — Status Register (STATR) The STATR register is used to read the device status and the various configuration register contents without disrupting the device operation or the register contents ...
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... SPI configuration, and by toggling the WD bit (D7) the watchdog circuitry will continue to be reset while no programming or data readback functions are being requested from the device. Analog Integrated Circuit Device Data Turn ON Delay (ms 150 225 300 375 450 525 Timing (ms) 620 310 2500 1250 Freescale Semiconductor ...
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... OD6 : OD0 depend upon the bits from the most recent STATR command SOA2 : SOA0. Analog Integrated Circuit Device Data Freescale Semiconductor A valid message length is determined following a transition of Logic [0] to Logic [1]. If there is a valid message length, the data is latched into the appropriate registers. A valid message length is a multiple of eight bits ...
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... Table 12. state of the over-voltage protection (refer to Previous Address SOA[2:0] = 111 Null Data. No previous register Read Back command received, so bits OD2, OD1, and OD0 are null, or 000. (Table 17). OD1 OD0 FSI Pin WAKE Pin Table 15). Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... V PWR Voltage Regulator MCU I/O SCLK CS I I/O A/D Analog Integrated Circuit Device Data Freescale Semiconductor TYPICAL APPLICATIONS PWR DD 10 VDD 100nF 10µ WAKE 10k 4 IN 10k 8 SCLK 10k 33982B 7 CS 10k 3 RST 11 SO 10k CSNS 6 FSI 1k RFS Figure 12. Typical Applications ...
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... Vapor Phase Reflow (VPR): 215°C to 219°C • Infrared (IR) / Convection: 225°C +5.0 / -0°C The maximum peak temperature during the soldering process should not exceed 230°C. The time at maximum temperature should range from 10s to 40s maximum. Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... For the most current revision of the package, visit Analog Integrated Circuit Device Data Freescale Semiconductor PACKAGE DIMENSIONS www.freescale.com and perform a keyword search on 98ARL10596D. PNA SUFFIX 16-PIN PQFN NONLEADED PACKAGE 98ARL10521D ISSUE C PACKAGING PACKAGE DIMENSIONS 33982 29 ...
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... PACKAGING PACKAGE DIMENSIONS 33982 30 PACKAGE DIMENSIONS (CONTINUED) PNA SUFFIX 16-PIN PQFN NONLEADED PACKAGE 98ARL10521D ISSUE C Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... Single layer thermal test board per JEDEC JESD51-3 and JESD51-5. 5. Thermal resistance between the die junction and the exposed pad, “infinite” heat sink attached to exposed pad. Analog Integrated Circuit Device Data Freescale Semiconductor . θ This applies to R θ ...
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... This device is a dual die package. Index m indicates the die that is heated. Index n refers to the number of the die where the junction temperature is sensed Power Chip Logic Chip (°C/W) Area ( 300 41 32 600 39 29 Analog Integrated Circuit Device Data Freescale Semiconductor ...
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... Figure 15. Device on Thermal Test Board R 100 10 1 0.1 1.00E-03 1.00E-02 Figure 16. Transient Thermal Resistance R Device on Thermal Test Board Area A = 600(mm Analog Integrated Circuit Device Data Freescale Semiconductor x R θJA11 R θJA22 θJA12 θJA21 0 300 Heat spreading area A [mm²] 1.00E-01 1.00E+00 1.00E+01 1 ...
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... Added 7/2007 13 • Minor corrections to voltage • Changed the labeling header on 6/2008 14 • Updated Freescale form and style 7/2009 • Added Current Sense Leakage to Static Electrical Characteristics table (Table 3). 15.0 33982 34 REVISION HISTORY Pin Connections to the proper case outline Open Load Fault (Non-Latching) ...
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... Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer purchase or use Freescale Semiconductor products for any such unintended ...