MC9S12DG128VPVE Freescale, MC9S12DG128VPVE Datasheet - Page 22

• Manufacturer Part Number: MC9S12DG128VPVE
• Manufacturer: Freescale

Specifications of MC9S12DG128VPVE

• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 50MHz
• Interface Type: SCI/SPI/I2C/CAN
• Total Internal Ram Size: 8KB
• # I/os (max): 91
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.25V
• Operating Supply Voltage (min): 2.25/2.35/4.5V
• On-chip Adc: 2(8-chx10-bit)
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 112
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 128KB
• Lead Free Status / RoHS Status: Compliant

Device User Guide — 9S12DT128DGV2/D V02.16
22
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– Port H
– Port J[1:0]
– Port K
– Port M[7:6]
– Port P6
– Port S[7:4]
– PAD[15:8] (ATD1 channels)
Pins not available in 80 pin QFP package for MC9S12DB128, SC515846, and SC102202
– Port H
– Port J[7:6, 1:0]
– Port K
– Port M[1:0]
– Port P6
In order to avoid floating nodes the ports should be either configured as outputs by setting the
data direction register (DDRH at Base+$0262) to $FF, or enabling the pull resistors by writing
a $FF to the pull enable register (PERH at Base+$0264).
Port J pull-up resistors are enabled out of reset on all four pins (7:6 and 1:0). Therefore care must
be taken not to disable the pull enables on PJ[1:0] by clearing the bits PERJ1 and PERJ0 at
Base+$026C.
Port K pull-up resistors are enabled out of reset, i.e. Bit 7 = PUKE = 1 in the register PUCR at
Base+$000C. Therefore care must be taken not to clear this bit.
PM7:6 must be configured as outputs or their pull resistors must be enabled to avoid floating
inputs.
PP6 must be configured as output or its pull resistor must be enabled to avoid a floating input.
PS7:4 must be configured as outputs or their pull resistors must be enabled to avoid floating
inputs.
Out of reset the ATD1 is disabled preventing current flows in the pins. Do not modify the ATD1
registers!
In order to avoid floating nodes the ports should be either configured as outputs by setting the
data direction register (DDRH at Base+$0262) to $FF, or enabling the pull resistors by writing
a $FF to the pull enable register (PERH at Base+$0264).
Port J pull-up resistors are enabled out of reset on all four pins (7:6 and 1:0). Therefore care must
be taken not to disable the pull enables on PJ[7:6, 1:0] by clearing the bits PERJ7, PERJ6,
PERJ1 and PERJ0 at Base+$026C.
Port K pull-up resistors are enabled out of reset, i.e. Bit 7 = PUKE = 1 in the register PUCR at
Base+$000C. Therefore care must be taken not to clear this bit.
PM1:0 must be configured as outputs or their pull resistors must be enabled to avoid floating
inputs.
PP6 must be configured as output or its pull resistor must be enabled to avoid a floating input.
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