MPC860PVR80D4 Freescale, MPC860PVR80D4 Datasheet - Page 58

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MPC860PVR80D4

Manufacturer Part Number
MPC860PVR80D4
Description
Manufacturer
Freescale
Datasheet

Specifications of MPC860PVR80D4

Family Name
MPC8xx
Device Core
PowerQUICC
Device Core Size
32b
Frequency (max)
80MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.465/3.6V
Operating Supply Voltage (min)
2/3.135V
Operating Temp Range
0C to 95C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
357
Package Type
BGA
Lead Free Status / RoHS Status
Compliant

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CPM Electrical Characteristics
1
2
58
Num
135
136
137
138
139
The ratios SYNCCLK/RCLK1 and SYNCCLK/TCLK1 must be greater than or equal to 2/1.
SDACK is asserted whenever the SDMA writes the incoming frame DA into memory.
RSTRT active delay (from TCLK1 falling edge)
RSTRT inactive delay (from TCLK1 falling edge)
REJECT width low
CLKO1 low to SDACK asserted
CLKO1 low to SDACK negated
RENA(CD1)
CLSN(CTS1)
RCLK1
(Input)
(Input)
RxD1
(Input)
MPC860 PowerQUICC™ Family Hardware Specifications, Rev. 8
Figure 59. Ethernet Collision Timing Diagram
Figure 60. Ethernet Receive Timing Diagram
2
Table 22. Ethernet Timing (continued)
2
Characteristic
121
124
120
125
121
126
123
Min
10
10
All Frequencies
1
Last Bit
127
Freescale Semiconductor
Max
50
50
20
20
Unit
CLK
ns
ns
ns
ns

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