MCIMX356AJM5B Freescale, MCIMX356AJM5B Datasheet - Page 71
MCIMX356AJM5B
Manufacturer Part Number
MCIMX356AJM5B
Description
Manufacturer
Freescale
Datasheet
1.MCIMX356AJM5B.pdf
(148 pages)
Specifications of MCIMX356AJM5B
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of the DISPB_D3_CLK signal and active-low polarity of the DISPB_D3_HSYNC, DISPB_D3_VSYNC
and DISPB_D3_DRDY signals.
Figure 50
programmable.
Table 52
Freescale Semiconductor
DISPB_D3_HSYNC
DISPB_D3_VSYNC
DISPB_D3_DRDY
DISPB_D3_HSYNC
DISPB_D3_DRDY
DISPB_D3_DATA
IP5
IP6
IP7
IP8
DISPB_D3_CLK
ID
Start of line
shows timing parameters of signals presented in
depicts the vertical timing (timing of one frame). All figure parameters shown are
Display interface clock period
Display pixel clock period
Screen width
HSYNC width
IP11
Table 52. Synchronous Display Interface Timing Parameters—Pixel Level
Figure 49. TFT Panels Timing Diagram—Horizontal Sync Pulse
Figure 50. TFT Panels Timing Diagram—Vertical Sync Pulse
Parameter
i.MX35 Applications Processors for Automotive Products, Rev. 9
IP5
IP13
IP8
IP9
IP14
Symbol
Tdpcp
Tdicp
Thsw
Tsw
IP7
Figure 49
Tdicp
(DISP3_IF_CLK_CNT_D + 1) × Tdicp
(SCREEN_WIDTH + 1) × Tdpcp
(H_SYNC_WIDTH + 1) × Tdpcp
Start of frame
1
IP6
IP12
and
Figure
Value
50.
End of frame
IP10
IP15
Units
ns
ns
ns
ns
71
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