DM74LS283NX Fairchild Semiconductor, DM74LS283NX Datasheet
DM74LS283NX
Specifications of DM74LS283NX
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DM74LS283NX Summary of contents
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... Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram © 2000 Fairchild Semiconductor Corporation Features Full-carry look-ahead across the four bits Systems achieve partial look-ahead performance with ...
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Function Table H HIGH Level, L LOW Level Input conditions at A1, B1, A2, B2, and C0 are used to determine outputs 1 and 2 and the value of the internal carry C2. The values at C2, A3, B3, A4, ...
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Absolute Maximum Ratings Supply Voltage Input Voltage Operating Free Air Temperature Range Storage Temperature Range Recommended Operating Conditions Symbol Parameter V Supply Voltage CC V HIGH Level Input Voltage IH V LOW Level Input Voltage IL I HIGH Level Output ...
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Switching Characteristics and Symbol Parameter t Propagation Delay Time PLH LOW-to-HIGH Level Output t Propagation Delay Time PHL HIGH-to-LOW Level Output t Propagation Delay Time PLH LOW-to-HIGH Level Output t Propagation Delay ...
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Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M16A 5 www.fairchildsemi.com ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...