MC10E160FNR2G ON Semiconductor, MC10E160FNR2G Datasheet - Page 2
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MC10E160FNR2G
Manufacturer Part Number
MC10E160FNR2G
Description
Manufacturer
ON Semiconductor
Datasheet
1.MC10E160FNR2G.pdf
(8 pages)
Specifications of MC10E160FNR2G
Logical Function
Parity Gen/Checker
Logic Family
ECL
Number Of Elements
1
Number Of Bits
12
High Level Output Current
-50mA
Low Level Output Current
50mA
Pin Count
28
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Technology
ECL
Lead Free Status / RoHS Status
Compliant
V
D
EE
D
D
D
D
D
Warning: All V
connected to Power Supply to guarantee proper operation.
10
9
5
6
8
7
LOGIC DIAGRAM AND PINOUT ASSIGNMENT
* All V
26
27
28
2
3
4
1
D
D
CC
25
5
11
4
and V
CC
HOLD S-IN SHIFT CLK1 CLK2
Pinout: 28-Lead PLCC
D
, V
24
6
3
CCO
CCO
D
23
(Top View)
, and V
7
pins are tied together on the die.
2
D
22
8
SHIFT
EE
HOLD
1
CLK1
CLK2
D
D
S-IN
D
D
D
D
D
D
D
D
D
pins must be externally
D
EN
10
11
0
2
3
4
5
6
7
8
9
1
R
21
9
D
0
EN V
20
10
CCO
19
11
R
18
17
16
15
14
13
12
http://onsemi.com
Q
Q
V
Y
Y
V
NC
CC
CCO
LOGIC DIAGRAM
2
1
0
MUX
SEL
PIN DESCRIPTION
D
S-IN
EN
HOLD
SHIFT
CLK1, CLK2
R
Q, Q
Y, Y
V
V
NC
0
CC
EE
− D
, V
1
0
MUX
11
CCO
SEL
PIN
D
R
ECL Data Inputs
ECL Serial Data Input
ECL Enable, active LOW
ECL Hold, active LOW
ECL Shift, active HIGH
ECL Clock Inputs
ECL Reset Inputs
ECL Direct Output
ECL Register Output
Positive Supply
Negative Supply
No Connect
Q
Y
Y
FUNCTION