FXL5T244BQX_NL Fairchild Semiconductor, FXL5T244BQX_NL Datasheet - Page 2

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FXL5T244BQX_NL

Manufacturer Part Number
FXL5T244BQX_NL
Description
Manufacturer
Fairchild Semiconductor
Datasheet

Specifications of FXL5T244BQX_NL

Logic Family
FXL
Logical Function
Translator
Technology
CMOS
High Level Output Current
-24mA
Low Level Output Current
24mA
Operating Supply Voltage (typ)
1.8/2.5/3.3V
Package Type
DQFN EP
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
1.1V
Abs. Propagation Delay Time
24ns
Mounting
Surface Mount
Pin Count
14
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Output Type
3-State
Lead Free Status / RoHS Status
Compliant
www.fairchildsemi.com
Terminal Descriptions
Connection Diagram
Power-Up/Power-Down Sequencing
FXL translators offer an advantage in that either V
be powered up first. This benefit derives from the chip
design. When either V
HIGH-Impedance state. The control input, OE, is designed
to track the V
should be used to ensure that bus contention, excessive
currents, or oscillations do not occur during power-up/
power-down. The size of the pull-up resistor is based upon
the current-sinking capability of the OE driver.
OE
A
Y
V
V
GND
n
n
CCI
CCO
Terminal
Names
Terminal Assignments for DQFN
CCI
Output Enable Input
Data Inputs
3-STATE Outputs
Inputs Power Supply
Outputs Power Supply
Ground
supply. A pull-up resistor tying OE to V
CC
(Top View)
is at 0 volts, outputs are in a
Description
CC
may
CCI
2
Truth Table
H
L
X
Terminal Assignment
The recommended power-up sequence is the following:
1. Apply power to either V
2. Apply power to the OE input (Logic HIGH for A-to-B
3. Apply power to other V
4. Drive the OE input LOW to enable the device.
The recommended power-down sequence is the following:
1. Drive OE input HIGH to disable the device.
2. Remove power from either V
3. Remove power from other V
LOW Voltage Level
HIGH Voltage Level
Don’t Care
operation; Logic LOW for B-to-A operation) and to the
respective data inputs (A Port or B Port). This may
occur at the same time as Step 1.
OE
H
L
L
Terminal Number
Inputs
10
11
12
13
14
1
2
3
4
5
6
7
8
9
CC
CC
A
.
H
X
L
.
n
CC
CC
Terminal Name
.
.
V
GND
V
OE
A
A
A
A
A
Y
Y
Y
Y
Y
CCO
CCI
0
1
2
3
4
4
3
2
1
0
Outputs
3-STATE
Y
H
L
n

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