82V3280EQG IDT, Integrated Device Technology Inc, 82V3280EQG Datasheet - Page 47
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82V3280EQG
Manufacturer Part Number
82V3280EQG
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.82V3280EQG.pdf
(171 pages)
Specifications of 82V3280EQG
Function
Wan PLL
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Package Type
TQFP
Pin Count
100
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
82V3280EQG
Manufacturer:
IDT
Quantity:
20 000
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4
Figure
4.1
device.
Typical Application
IDT82V3280
The device supports Master / Slave application, as shown in
Master / Slave application is only supported by the T0 path of the
15:
TYPICAL APPLICATION
MASTER / SLAVE APPLICATION
MHz and other
Typical 19.44
Line Timing
OC-N clock
or other Equipment
Timing System
SDH/SONET
and other OC-N clock
Typical 19.44 MHz
155.52 Mbit/s
IDT82V3255
Line Card
2/3E/3/SMC/SEC
Timing Module
Stratum 2/3E
IDT82V3288
IDT82V3280
BITS/SSU
Stratum
Module
Figure 15. Typical Application
. . .
Typical 8 kHz/1.544 MHz/2.048 MHz
(Primary Reference Source)
622.08 Mbit/s
IDT82V3255
Line Card
Central Clock
Master/Slave
Modules
47
PRS
Of the two devices, one is configured as the Master and the other is con-
figured as the Slave. Refer to
for details.
In Master / Slave application, two devices should be used together.
IDT82V3255
2.5 Gbit/s
Line Card
2/3E/3/SMC/SEC
Timing Module
Stratum 2/3E
IDT82V3288
IDT82V3280
BITS/SSU
Stratum
Module
and other OC-N clock
. . .
Chapter 3.14 Master / Slave Configuration
Typical 19.44 MHz
IDT82V3255
Line Card
10 Gbit/s
MHz and other
Typical 19.44
OC-N clock
Line Timing
December 9, 2008
WAN PLL
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