74ALVCH16270PVG IDT, Integrated Device Technology Inc, 74ALVCH16270PVG Datasheet

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74ALVCH16270PVG

Manufacturer Part Number
74ALVCH16270PVG
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of 74ALVCH16270PVG

Lead Free Status / RoHS Status
Compliant
FEATURES:
• 0.5 MICRON CMOS Technology
• Typical t
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
• V
• V
• V
• CMOS power levels (0.4µ µ µ µ µ W typ. static)
• Rail-to-Rail output swing for increased noise margin
• Available in SSOP, TSSOP, and TVSOP packages
DRIVE FEATURES:
• High Output Drivers: ±24mA
• Suitable for heavy loads
APPLICATIONS:
• 3.3V high speed systems
• 3.3V and lower voltage computing systems
FUNCTIONAL BLOCK DIAGRAM
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
© 1999 Integrated Device Technology, Inc.
IDT74ALVCH16270
3.3V CMOS 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER
machine model (C = 200pF, R = 0)
CC
CC
CC
= 3.3V ± 0.3V, Normal Range
= 2.5V ± 0.2V
= 2.7V to 3.6V, Extended Range
SK(o)
(Output Skew) < 250ps
CLKEN1B
CLKEN2B
CLKENA2
CLKENA1
C LK
OEB
SEL
OEA
A1
8
27
1
29
2
30
55
56
28
1 of 12 Channels
3.3V CMOS 12-BIT TO
24-BIT REGISTERED BUS
EXCHANGER WITH 3-STATE
OUTPUTS AND BUS-HOLD
1D
C1
C E
1D
C1
0
1
1
DESCRIPTION:
technology. The ALVCH16270 is used in applications in which data must be
transferred from a narrow high-speed bus to a wide lower-frequency bus.
Data is stored in the internal registers on the low-to-high transition of the clock
(CLK) input when the appropriate clock-enable (CLKEN) inputs are low. The
select (SEL) line selects 1B or 2B data for the A outputs. For data transfer in the
A-to-B direction, a two-stage pipeline is provided in the A-to-1B path, with a single
storage register in the A-to-2B path. Proper control of the CLKENA input allows
two sequential 12-bit words to be presented synchronously as a 24-bit word on
the B-port. Data flow is controlled by the active-low output enables (OEA and
OEB). The control terminals are registered to synchronize the bus-direction
changes with CLK.
driver is capable of driving a moderate to heavy load while maintaining speed
performance.
ever the input goes to a high impedance. This prevents floating inputs and
eliminates the need for pull-up/down resistors.
This registered bus exchanger is built using advanced dual metal CMOS
This device provides synchronous data exchange between the two ports.
The ALVCH16270 has been designed with a
The ALVCH16270 has “bus-hold” which retains the inputs’ last state when-
CE
CE
CE
CE
1D
1D
1D
C1
C 1
C 1
C 1
C 1
1D
1D
INDUSTRIAL TEMPERATURE RANGE
IDT74ALVCH16270
23
6
1
2
B
B
1
1
±
AUGUST 1999
24mA output driver. This
DSC-4475/1

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74ALVCH16270PVG Summary of contents

Page 1

IDT74ALVCH16270 3.3V CMOS 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER FEATURES: • 0.5 MICRON CMOS Technology • Typical t (Output Skew) < 250ps SK(o) • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R ...

Page 2

IDT74ALVCH16270 3.3V CMOS 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER PIN CONFIGURATION OEA 1 2 CLKEN1B GND ...

Page 3

IDT74ALVCH16270 3.3V CMOS 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER PIN DESCRIPTION Pin Names I/O Description Ax I/O Bidirectional Data Port A. Usually connected to the CPU’s Address/Data bus. (1:12) 1Bx I/O Bidirectional Data Port 1B. Usually connected to the even ...

Page 4

IDT74ALVCH16270 3.3V CMOS 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER BUS-HOLD CHARACTERISTICS (1) Symbol Parameter I Bus-Hold Input Sustain Current BHH I BHL I Bus-Hold Input Sustain Current BHH I BHL I Bus-Hold Input Overdrive Current BHHO I BHLO NOTES: 1. ...

Page 5

IDT74ALVCH16270 3.3V CMOS 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER SWITCHING CHARACTERISTICS Symbol Parameter f MAX t Propagation Delay PLH t CLK to xBx PHL t Propagation Delay PLH t CLK to Ax PHL t Propagation Delay PLH t SEL to ...

Page 6

IDT74ALVCH16270 3.3V CMOS 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER TEST CIRCUITS AND WAVEFORMS TEST CONDITIONS (1) (1) Symbol V = 3.3V±0. 2. LOAD V 2.7 2 1.5 1 300 ...

Page 7

IDT74ALVCH16270 3.3V CMOS 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER ORDERING INFORMATION ALVC X XX IDT XX Temp. Range Bus-Hold Family CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 XX XXX Device Type Package 270 16 H ...

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