BOXD945GCZL Intel (CPU), BOXD945GCZL Datasheet - Page 52

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BOXD945GCZL

Manufacturer Part Number
BOXD945GCZL
Description
Manufacturer
Intel (CPU)
Datasheet

Specifications of BOXD945GCZL

Lead Free Status / RoHS Status
Supplier Unconfirmed
Intel Desktop Board D945GCZ Technical Product Specification
52
Table 15.
In PIC mode, the ICH7 can connect each PIRQ line internally to one of the IRQ signals (3, 4, 5, 6,
7, 9, 10, 11, 12, 14, and 15). Typically, a device that does not share a PIRQ line will have a unique
interrupt. However, in certain interrupt-constrained situations, it is possible for two or more of the
PIRQ lines to be connected to the same IRQ signal. Refer to Table 14 for the allocation of PIRQ
lines to IRQ signals in APIC mode.
PCI interrupt assignments to the USB ports, Serial ATA ports, and PCI Express ports are dynamic.
PCI Interrupt Source
ICH7 LAN
PCI bus connector 1
PCI bus connector 2
IEEE-1394a controller
(optional)
NOTE
PCI Interrupt Routing Map
PIRQA
PIRQB
PIRQC
ICH7 PIRQ Signal Name
PIRQD
INTA
PIRQE
INTA
INTD
INTC
PIRQF
INTA
INTB
PIRQG
INTB
INTA
PIRQH
INTC
INTD