77V550S25DTG8 IDT, Integrated Device Technology Inc, 77V550S25DTG8 Datasheet - Page 7

• Manufacturer Part Number: 77V550S25DTG8
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 77V550S25DTG8

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 80
• Lead Free Status / RoHS Status: Compliant

AC Test Conditions
AC Test Conditions
DPI Interface
DPI Interface
supports a 4-bit wide data bus (DPI-4), with separate transmit and receive interfaces. All signals are sampled on the rising edge of their respective
clock.
DPI Receive Path
DPI Receive Path
It has 4-bit Data Buses (IPD[3:0] and IPD
nical Note TN-34). Other signals associated with this interface are DPI Receive Start of Frame (IFRM and IFRM
ICLK
before the first nibble of valid data.
IDT77V550
The Data Path Interface (DPI) is a synchronous bus interface designed to transfer ATM cells between two devices. The IDT77V550 DPI interface
The DPI Receive Path is used to transfer cells through the IDT77V550 Switch Manager to the IDT77V400 Switching Memory or other DPI device.
ICLK is an input to the IDT77V500, and ICLK
IFRM/IFRM
Figure 5 and Figure 6 illustrate these timing relationships for a single cell transfer and a Back-to-Back cell transfer on the receive DPI bus.
M
).
Note: 1.At f = fmax SCLK, ICLK, and OCLK are cycling at their maximum frequency and all inputs are cycling at 1/tCYC1, using AC input
M
Symbol
Figure 4 AC Output Test Load (left side) and Output Test Load (for t
is the start of frame marker. This signal is one ICLK/ICLK
levels of VSS to 3.0V.
I
CC
Table 7 DC Electrical Characteristics over the Operating Temperature and Supply Voltage Range
Operating Current
Parameter
DATA
M
[3:0]) and follows the standard DPI timing characteristics as described in the DPI specification (IDT Tech-
BUSY
OUT
INT
M
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Output Load
to the IDT77V400 (an Output) is generated from ICLK.
V
RESETI= V
435½
CC
Test Conditions
= 3.6V, I
Table 8 AC Test Conditions
IH
OUT
, f = fmax
3.3V
= 0mA,
590
30pF
7 of 19
(1)
M
cycle long and is asserted HIGH one ICLK/ICLK
DATA
77V550S25DLI
Typ.
100
GND to 3.0V
5ns Max.
1.5V
1.5V
Figures 4 and 5
OUT
LZ
, t
HZ
435
, t
WZ
Max.
, tow) *Including scop and jig (right side)
180
3.3V
77V550S25DL
Typ.
590
5pF*
100
4523 drw 04
M
) and DPI Receive Clock (ICLK and
Max.
160
M
Unit
cycle
mA
June 22, 2001