LU82551QM 860611 Intel, LU82551QM 860611 Datasheet - Page 24
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LU82551QM 860611
Manufacturer Part Number
LU82551QM 860611
Description
Manufacturer
Intel
Datasheet
1.LU82551QM_860611.pdf
(120 pages)
Specifications of LU82551QM 860611
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
196
Lead Free Status / RoHS Status
Compliant
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82551QM — Networking Silicon
18
Figure 2. CSR I/O Read Cycle
Figure 3. CSR I/O Write Cycle
Read Accesses: The CPU, as the initiator, drives address lines AD[31:0], the command and byte
enable lines C/BE#[3:0] and the control lines IRDY# and FRAME#. As a slave, the 82551QM
controls the TRDY# signal and provides valid data on each data access. The 82551QM allows the
CPU to issue only one read cycle when it accesses the Control/Status Registers, generating a
disconnect by asserting the STOP# signal. The CPU can insert wait states by de-asserting IRDY#
when it is not ready.
CLK
FRAME#
AD
C/BE#
IRDY#
TRDY#
DEVSEL#
STOP#
CLK
FRAME#
AD
C/BE#
IRDY#
TRDY#
DEVSEL#
STOP#
1
I/O RD
1
ADDR
I/O WR
ADDR
2
2
3
BE#
3
DATA
BE#
DATA
4
4
5
5
6
6
7
7
8
8
9
9
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