MT41J256M8JE-187E ES:A Micron Technology Inc, MT41J256M8JE-187E ES:A Datasheet - Page 172
MT41J256M8JE-187E ES:A
Manufacturer Part Number
MT41J256M8JE-187E ES:A
Description
Manufacturer
Micron Technology Inc
Type
DDR3 SDRAMr
Datasheet
1.MT41J256M8JE-187E_ESA.pdf
(181 pages)
Specifications of MT41J256M8JE-187E ES:A
Organization
256Mx8
Address Bus
15b
Maximum Clock Rate
1.066GHz
Operating Supply Voltage (typ)
1.5V
Package Type
FBGA
Operating Temp Range
0C to 95C
Operating Supply Voltage (max)
1.575V
Operating Supply Voltage (min)
1.425V
Supply Current
295mA
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Compliant
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Figure 115: ODT During READs
DQS, DQS#
Command
Address
ODT
CK#
DQ
CK
R
TT
READ
Valid
T0
NOP
T1
Notes:
NOP
T2
1. ODT must be disabled externally during READs by driving ODT LOW. For example, CL = 6; AL = CL - 1 = 5; RL = AL +
CL = 11; CWL = 5; ODTL on = CWL + AL - 2 = 8; ODTL off = CWL + AL - 2 = 8. R
NOP
T3
NOP
T4
ODTL off = CWL + AL - 2
R
TT
_
NOM
RL = AL + CL
NOP
T5
NOP
T6
NOP
T7
NOP
T8
NOP
T9
t AOF (MIN)
t AOF (MAX)
NOP
T10
ODTL on = CWL + AL - 2
NOP
T11
DI
b
b + 1
DI
NOP
T12
TT
b + 2
DI
_
NOM
b + 3
DI
NOP
T13
is enabled. R
b + 4
DI
b + 5
DI
NOP
T14
b + 6
DI
b + 7
TT
DI
NOP
Transitioning
T15
_
WR
is a “Don’t Care.”
t AON (MAX)
NOP
T16
R
TT
_
NOM
Don’t Care
NOP
T17
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