IS42S32400E-6BLI-TR ISSI, Integrated Silicon Solution Inc, IS42S32400E-6BLI-TR Datasheet - Page 11

• Manufacturer Part Number: IS42S32400E-6BLI-TR
• Manufacturer: ISSI, Integrated Silicon Solution Inc
• Type: SDRAMr

Specifications of IS42S32400E-6BLI-TR

• Organization: 4Mx32
• Density: 128Mb
• Address Bus: 14b
• Access Time (max): 6.5/5.4ns
• Maximum Clock Rate: 166MHz
• Operating Supply Voltage (typ): 3.3V
• Package Type: TFBGA
• Operating Temp Range: -40C to 85C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 180mA
• Pin Count: 90
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Compliant

IS42S32400E, IS45S32400E
FUNCTIONAL TRUTH TABLE Continued:
Current State
Write Recovering
Write Recovering
with Auto
Precharge
Refresh
Mode Register
Accessing
Note: H=V
Integrated Silicon Solution, Inc. - www.issi.com
Rev. E
10/28/10
Notes:
1. All entries assume that CKE is active (CKEn-1=CKEn=H).
2. If both banks are idle, and CKE is inactive (Low), the device will enter Power Down mode. All input buffers except CKE will be
3. Illegal to bank in specified states; Function may be legal in the bank indicated by Bank Address (BA), depending on the state of
4. If both banks are idle, and CKE is inactive (Low), the device will enter Self-Refresh mode. All input buffers except CKE will be
5. Illegal if tRCD is not satisfied.
6. Illegal if tRAS is not satisfied.
7. Must satisfy burst interrupt condition.
8. Must satisfy bus contention, bus turn around, and/or write recovery requirements.
9. Must mask preceding data which don’t satisfy tDPL.
10. Illegal if tRRD is not satisfied.
11. Illegal for single bank, but legal for other banks.
disabled.
that bank.
disabled.
ih
, L=V
il
x= V
CS RAS CAS WE
H
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
H
L
L
L
L
ih
or V
×
H
H
H
H
L
L
L
L
×
H
H
H
H
L
L
L
L
×
H
H
H
L
L
L
L
×
H
H
H
L
il
, V = Valid Data, BA= Bank Address, CA+Column Address, RA=Row Address, OC= Op-Code
×
H
H
L
L
H
H
L
L
×
H
H
L
L
H
H
L
L
×
H
L
L
H
H
L
L
×
H
H
L
×
×
H
L
H
L
H
L
H
L
×
H
L
H
L
H
L
H
L
×
×
H
L
H
L
H
L
×
H
L
×
×
Address
×
×
×
BA, CA, A10
BA, CA, A10
BA, RA
BA, A10
×
OC, BA
×
×
×
BA, CA, A10
BA, CA, A10
BA, RA
BA, A10
×
OC, BA
×
×
BA, CA, A10
BA, CA, A10
BA, RA
BA, A10
×
OC, BA
×
×
×
BA, CA, A10
BA, RA
Command
DESL
NOP
BST
READ/READA
WRIT/ WRITA
ACT
PRE/PALL
REF/SELF
MRS
DESL
NOP
BST
READ/READA
WRIT/WRITA
ACT
PRE/PALL
REF/SELF
MRS
DESL
NOP/BST
READ/READA
WRIT/WRITA
ACT
PRE/PALL
REF/SELF
MRS
DESL
NOP
BST
READ/WRITE
ACT/PRE/PALL ILLEGAL
REF/MRS
Action
Nop, Enter row active after tDPL
Nop, Enter row active after tDPL
Nop, Enter row active after tDPL
Begin read
Begin new write
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
Nop, Enter precharge after tDPL
Nop, Enter precharge after tDPL
Nop, Enter row active after tDPL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
Nop, Enter idle after tRC
Nop, Enter idle after tRC
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
Nop, Enter idle after 2 clocks
Nop, Enter idle after 2 clocks
ILLEGAL
ILLEGAL
(3,8,11)
(3)
(3)
(3,11)
(3,11)
(3,11)
(8)
11