MT36HTF51272FZ-667H1N8 Micron Technology Inc, MT36HTF51272FZ-667H1N8 Datasheet - Page 10

• Manufacturer Part Number: MT36HTF51272FZ-667H1N8
• Description: MODULE DDR2 SDRAM 4GB 240FBDIMM
• Manufacturer: Micron Technology Inc
• Series: -r

Specifications of MT36HTF51272FZ-667H1N8

• Main Category: DRAM Module
• Sub-category: DDR2 SDRAM
• Module Type: 240FBDIMM
• Device Core Size: 72b
• Organization: 512Mx72
• Chip Density: 1Gb
• Package Type: FBDIMM
• Maximum Clock Rate: 667MHz
• Operating Supply Voltage (typ): 1.8V
• Number Of Elements: 36
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Operating Temp Range: 0C to 95C
• Operating Temperature Classification: Commercial
• Pin Count: 240
• Mounting: Socket
• Memory Type: DDR2 SDRAM
• Memory Size: 4GB
• Speed: 667MT/s
• Features: -
• Package / Case: 240-FBDIMM
• Lead Free Status / RoHS Status: Supplier Unconfirmed

Serial Presence-Detect
Table 12:
Table 13:
Serial Presence-Detect Data
PDF: 09005aef83d491e1Source: 09005aef83d49311
htf36c512x72fz.fm - Rev. A 11/09 EN
Parameter/Condition
Parameter/Condition
EEPROM and AMB supply voltage
Input high voltage: Logic 1; all inputs
Input low voltage: Logic 0; all inputs
Output low voltage: I
Input leakage current: V
Output leakage current:
Standby current
Power supply current, READ: SCL clock frequency = 100 kHz
Power supply current, WRITE: SCL clock frequency = 100 kHz
SCL LOW to SDA data-out valid
Time the bus must be free before a new transition can start
Data-out hold time
SDA and SCL fall time
Data-in hold time
Start condition hold time
Clock HIGH period
Noise suppression time constant at SCL, SDA inputs
Clock LOW period
SDA and SCL rise time
SCL clock frequency
Data-in setup time
Start condition setup time
Stop condition setup time
WRITE cycle time
Serial Presence-Detect EEPROM DC Operating Conditions
All voltages referenced to V
Serial Presence-Detect EEPROM AC Operating Conditions
All voltages referenced to V
OUT
Notes: 1. To avoid spurious start and stop conditions, a minimum delay is placed between SCL = 1
IN
V
= 3mA
OUT
= GND to V
For the latest serial presence-detect data, refer to Micron's SPD page:
www.micron.com/SPD.
2. This parameter is sampled.
3. For a restart condition, or following a WRITE cycle.
4. The SPD EEPROM WRITE cycle time (
= GND to V
and the falling or rising edge of SDA.
write sequence to the end of the EEPROM internal ERASE/PROGRAM cycle. During the
WRITE cycle, the EEPROM bus interface circuit is disabled, SDA remains HIGH due to pull-
up resistance, and the EEPROM does not respond to its slave address.
DD
SS
SS
DD
10
4GB (x72, DR) 240-Pin DDR2 SDRAM FBDIMM
Symbol
Symbol
t
t
t
t
t
HD:DAT
V
HD:STA
SU:DAT
SU:STO
SU:STA
t
t
t
I
t
HIGH
LOW
f
DDSPD
WRC
V
I
t
t
V
CCW
BUF
V
I
SCL
I
CCR
AA
DH
t
I
t
t
LO
SB
t
WRC) is the time from a valid stop condition of a
OL
LI
R
IH
F
IL
I
Micron Technology, Inc., reserves the right to change products or specifications without notice.
V
Min
DDSPD
200
100
0.2
1.3
0.6
0.6
1.3
0.6
0.6
0
–
–
–
–
–
Min
0.10
0.05
–0.6
1.6
0.4
3
–
2
× 0.7
Serial Presence-Detect
Max
300
400
0.9
0.3
50
10
–
–
–
–
–
–
–
–
–
©2009 Micron Technology, Inc. All rights reserved.
V
V
DDSPD
DDSPD
Max
3.6
0.4
3
3
4
1
3
Units
kHz
+ 0.5
× 0.3
ms
µs
µs
ns
ns
µs
µs
µs
ns
µs
µs
ns
µs
µs
Notes
Units
mA
mA
µA
µA
µA
V
V
V
V
1
2
2
3
4