STK11C68-P45 Cypress Semiconductor Corp, STK11C68-P45 Datasheet - Page 5

• Manufacturer Part Number: STK11C68-P45
• Manufacturer: Cypress Semiconductor Corp
• Type: NVSRAMr

Specifications of STK11C68-P45

• Word Size: 8b
• Organization: 8Kx8
• Density: 64Kb
• Interface Type: Parallel
• Access Time (max): 45ns
• Operating Supply Voltage (typ): 5V
• Package Type: PDIP
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Operating Temp Range: 0C to 70C
• Pin Count: 28
• Mounting: Through Hole
• Supply Current: 65mA
• Lead Free Status / RoHS Status: Not Compliant

Document Control #ML0007 Rev 0.3
SRAM WRITE CYCLES #1 & #2
Note i:
Note j:
SRAM WRITE CYCLE #1: W Controlled
SRAM WRITE CYCLE #2: E Controlled
NO.
12
13
14
15
16
17
18
19
20
21
ADDRESS
DATA OUT
DATA OUT
ADDRESS
DATA IN
February, 2007
DATA IN
t
WLQZ
t
t
t
t
t
t
t
t
t
WLWH
DVWH
WHDX
WHAX
WHQX
ELWH
AVWH
AVWL
If W is low when E goes low, the outputs remain in the high-impedance state.
E or W must be ≥ V
AVAV
#1
W
E
h, i
W
E
SYMBOLS
t
t
t
t
t
t
t
t
WLEH
DVEH
EHDX
AVEH
EHAX
AVAV
ELEH
AVEL
#2
IH
t
AVWL
18
t
during address transitions.
AVEL
18
Alt.
t
t
t
t
t
t
t
t
t
t
OW
WC
WP
CW
DW
AW
WR
WZ
DH
AS
PREVIOUS DATA
Write Cycle Time
Write Pulse Width
Chip Enable to End of Write
Data Set-up to End of Write
Data Hold after End of Write
Address Set-up to End of Write
Address Set-up to Start of Write
Address Hold after End of Write
Write Enable to Output Disable
Output Active after End of Write
PARAMETER
t
WLQZ
20
t
AVEH
17
t
AVWH
17
t
WLWH
13
t
ELWH
14
t
AVAV
j
12
t
j
AVAV
5
12
HIGH IMPEDANCE
t
ELEH
14
t
WLEH
13
STK11C68-25
MIN
25
20
20
10
20
0
0
0
5
HIGH IMPEDANCE
t
DVWH
15
MAX
t
10
DVEH
15
DATA VALID
STK11C68 (SMD5962–92324)
DATA VALID
STK11C68-35
MIN
35
25
25
12
25
0
0
0
5
MAX
13
t
WHDX
STK11C68-45
t
WHAX
MIN
16
45
30
30
15
30
19
0
0
0
5
t
t
EHAX
EHDX
19
16
(V
t
WHQX
MAX
21
15
CC
= 5.0V + 10%)
STK11C68-55
MIN
55
45
45
30
45
0
0
0
5
MAX
35
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns