AD6622AS Analog Devices Inc, AD6622AS Datasheet - Page 23

• Manufacturer Part Number: AD6622AS
• Manufacturer: Analog Devices Inc

Specifications of AD6622AS

• Lead Free Status / RoHS Status: Not Compliant

INTERNAL CONTROL REGISTERS AND ON-CHIP RAM
Listed below is the mapping of internal AD6622 registers.
Address
Common Function Registers (Not Associated with a Particular Channel)
0x000
0x001
Channel Function Registers (0x1XX = Ch. A, 0x2XX = Ch. B, 0x3XX = Ch. C, 0x4XX = Ch. D )
0x100
0x101
0x102
0x103
0x104
0x105
0x106
0x107
0x108
0x109
0x10A
0x10B
0x10C
0x10D
0x10E
0x10F
0x110
0x111
0x112–0x11F
0x120–0x13F
0x140–0x17F
0x180–0x1FF
Additional Channels
0x200–0x2FF
0x300–0x3FF
0x400-0x4FF
Bit Width
8
8
16
8
32
16
16
16
8
8
8
8
8
8
8
8
16
16
16
16
16
16
16
Various
Various
Various
Name
Summation MODE Control
Sync MODE Control
Start Update Hold-Off Counter
NCO Control
NCO Frequency
NCO Freq Hold Off
NCO Phase Offset
NCO Phase Hold Off
CIC Scale
Reserved
CIC2 Interpolation-1
CIC5 Interpolation-1
RCF Coefficient Count
RCF Coefficient Offset
Channel MODE Control 1
Channel MODE Control 2
Reserved
Reserved
Reserved
Data Memory
Reserved
Coefficient Memory
Channel B
Channel C
Channel D
Table XIII. Internal Memory Map
Notation
N
O
N
RCF
RCF
RCF
-1
/L
RCF
-1
Description
0: Clip Wideband Output
1: Offset Binary Wideband Output
2: Reserved, Must Be Set High
3–7: Reserved, Should Be Set Low
0: Ch. A Sync Pin Enable
1: Ch. B Sync Pin Enable
2: Ch. C Sync Pin Enable
3: Ch. D Sync Pin Enable
4: Start on Pin Sync
5: Hop on Pin Sync
6: Beam Steer on Pin Sync
7: First Sync Only
Start Update Hold Off Counter
1-0: Ch. A NCO Output Scale
2: Ch. A NCO Clear Phase Accum on Sync
3: Ch. A NCO Phase Dither Enable
4: Ch. A NCO Amp Dither Enable
7–5: Reserved
Ch. A NCO Frequency Value
Ch. A NCO Frequency Update Hold-Off Ctr
Ch. A NCO Phase Offset
Ch. A NCO Phase Offset Update Hold-Off Ctr
4–0: Ch. A CIC Scale
7–5: Reserved
7–0: Reserved
Ch. A CIC2 Interpolation Factor-1
Ch. A CIC5 Interpolation Factor-1
6–0: Ch. A RCF Coefficient Count, N
7: Reserved
6–0: Ch. A RCF Coefficient Offset
7: Reserved
3–0: Ch. A N
5–4: Ch. A Input Format:
6: Reserved
7: Reserved
4–0: Ch. A Serial Clock Divider
5: Ch. A Phase EQ Enable
7–6: Ch. A RCF Coarse Scale:
15–0: Reserved
15–0: Reserved
Reserved
Reserved
Reserved
Ch. A Data Memory
Reserved
Ch. A Coefficient Memory
Ch. B Registers (Organized as Ch. A Above)
Ch. C Registers (Organized as Ch. A Above)
Ch. D Registers (Organized as Ch. A Above)
00 = FIR
00 = 0 dB
01 = –6 dB
10 = –12 dB
11 = –18 dB
RCF
/L
RCF
–1
AD6622
RCF
–1