AD8312-EVALZ Analog Devices Inc, AD8312-EVALZ Datasheet - Page 7

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AD8312-EVALZ

Manufacturer Part Number
AD8312-EVALZ
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD8312-EVALZ

Lead Free Status / RoHS Status
Compliant
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 3. Pin Function Descriptions
Ball No.
1
2
3
4
5
6
Mnemonic
VPOS
VOUT
VSET
CFLT
COMM
RFIN
Description
Positive Supply Voltage (V
Logarithmic Output. Output voltage increases with increasing input amplitude.
Setpoint Input. Connect VSET to VOUT for measurement-mode operation. The nominal logarithmic slope of
20 mV/dB can be increased to an arbitrarily high value by attenuating the signal between VOUT and VSET
(see the Increasing the Logarithmic Slope section).
Connection for an External Capacitor to Slow the Response of the Output. Capacitor is connected between
CFLT and VOUT.
Device Common (Ground).
RF Input.
S
), 2.7 V to 5.5 V.
VPOS
VOUT
VSET
Figure 2. Pin Configuration
Rev. 0| Page 7 of 20
(Not to Scale)
AD8312
TOP VIEW
1
2
3
6
5
4
RFIN
COMM
CFLT
AD8312