LFEC6E-3F256C LATTICE SEMICONDUCTOR, LFEC6E-3F256C Datasheet - Page 45

• Manufacturer Part Number: LFEC6E-3F256C
• Description: FPGA LatticeEC Family 6100 Cells 340MHz 130nm (CMOS) Technology 1.2V 256-Pin FBGA
• Manufacturer: LATTICE SEMICONDUCTOR

Specifications of LFEC6E-3F256C

• Package: 256FBGA
• Family Name: LatticeEC
• Device Logic Units: 6100
• Maximum Internal Frequency: 340 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 195
• Ram Bits: 94208
• In System Programmability: Yes

Lattice Semiconductor
BLVDS
The LatticeECP/EC devices support BLVDS standard. This standard is emulated using complementary LVCMOS
outputs in conjunction with a parallel external resistor across the driver outputs. BLVDS is intended for use when
multi-drop and bi-directional multi-point differential signaling is required. The scheme shown in Figure 3-2 is one
possible solution for bi-directional multi-point differential signals.
Figure 3-2. BLVDS Multi-point Output Example
Table 3-2. BLVDS DC Conditions
2.5V
2.5V
+
-
Z
R
R
V
V
V
V
I
1. For input buffer, see LVDS table.
DC
OUT
OH
OL
OD
Parameter
TLEFT
TRIGHT
CM
80
80
Heavily loaded backplane, effective Zo ~ 45 to 90 ohms differential
2.5V
Over Recommended Operating Conditions
Output impedance
Left end termination
Right end termination
Output high voltage
Output low voltage
Output differential voltage
Output common mode voltage
DC output current
1
45-90 ohms
80
2.5V
Description
80
3-9
-
. . .
. . .
2.5V
80
Zo = 45
1.375
1.125
0.25
1.25
11.2
100
45
45
Typical
DC and Switching Characteristics
LatticeECP/EC Family Data Sheet
2.5V
80
45-90 ohms
Zo = 90
1.48
1.02
0.46
1.25
10.2
100
90
90
80
-
Units
ohm
ohm
ohm
mA
V
V
V
V
2.5V
2.5V
+
-