LFXP3E-3TN100C LATTICE SEMICONDUCTOR, LFXP3E-3TN100C Datasheet - Page 62

• Manufacturer Part Number: LFXP3E-3TN100C
• Description: FPGA LatticeXP Family 3000 Cells 320MHz 130nm (CMOS) Technology 1.2V 100-Pin TQFP Tray
• Manufacturer: LATTICE SEMICONDUCTOR

Specifications of LFXP3E-3TN100C

• Package: 100TQFP
• Family Name: LatticeXP
• Device Logic Units: 3000
• Maximum Internal Frequency: 320 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 62
• Ram Bits: 55296
• Re-programmability Support: Yes

Lattice Semiconductor
PICs and DDR Data (DQ) Pins Associated with the DDR Strobe (DQS) Pin
P[Edge] [n-4]
P[Edge] [n-3]
P[Edge] [n-2]
P[Edge] [n-1]
P[Edge] [n]
P[Edge] [n+1]
P[Edge] [n+2]
P[Edge] [n+3]
Notes:
1. “n” is a row/column PIC number.
2. The DDR interface is designed for memories that support one DQS strobe per eight bits of data. In some packages, all the potential DDR
3. The definition of the PIC numbering is provided in the Signal Names column of the Signal Descriptions table in this data sheet.
data (DQ) pins may not be available.
with DQS Strobe
PICs Associated
PIO within PIC
A
B
A
B
A
B
A
B
A
B
A
B
A
B
4-3
Complement
Complement
Complement
Complement
Complement
Complement
Complement
Polarity
True
True
True
True
True
True
True
LatticeXP Family Data Sheet
Pinout Information
and Data (DQ) Pins
DDR Strobe (DQS)
[Edge]DQSn
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ