RFM31B-868-D QUASAR, RFM31B-868-D Datasheet - Page 34

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RFM31B-868-D

Manufacturer Part Number
RFM31B-868-D
Description
MODULE, RECEIVER, -118DB, 868MHZ
Manufacturer
QUASAR
Datasheet

Specifications of RFM31B-868-D

Modulation Type
FSK, GFSK, OOK
Sensitivity
-121dBm
Power Supply
1.8V To 3.6V
Supply Current
18.5mA
Data Rate Max
256Kbps
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
RFM31B
initiated. The timeout period after preamble detections is defined as the value programmed into the sync word
length plus four additional bits.
6.9. Receive Header Check
The header check is designed to support 1–4 bytes and broadcast headers. The header length needs to be set in
register 33h, hdlen[2:0]. The headers to be checked need to be set in register 32h, hdch[3:0]. For instance, there
can be four bytes of header in the packet structure but only one byte of the header is set to be checked (i.e.,
header 3). For the headers that are set to be checked, the expected value of the header should be programmed in
chhd[31:0] in Registers 3F–42. The individual bits within the selected bytes to be checked can be enabled or
disabled with the header enables, hden[31:0] in Registers 43–46. For example, if you want to check all bits in
header 3 then hden[31:24] should be set to FF but if only the last 4 bits are desired to be checked then it should be
set to 00001111 (0F). Broadcast headers can also be programmed by setting bcen[3:0] in Register 32h. For
broadcast header check the value may be either “FFh” or the value stored in the Check Header register. A logic
equivalent of the header check for Header 3 is shown in Figure 17. A similar logic check will be done for Header 2,
Header 1, and Header 0 if enabled.
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hden[31:24]
chhd[31:24]
rxhd[31:24]
rxhd[31:24]
FFh
Fax: +86-755-82973550
WISE
WISE
Equivalence
comparison
BIT
BIT
=
Example for Header 3
bcen[3]
Figure 17. Header
hdch[3]
Equivalence
comparison
E-mail: sales@hoperf.com http://www.hoperf.com
=
header3_ok

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