PI6C48545-11LE Pericom Semiconductor, PI6C48545-11LE Datasheet - Page 2

• Manufacturer Part Number: PI6C48545-11LE
• Description: Clock Buffer 3.3V Low Skew 1:4 Cryst/LVCMOS
• Manufacturer: Pericom Semiconductor
• Type: Clock Driverr

Specifications of PI6C48545-11LE

• Number Of Clock Inputs: 2
• Mode Of Operation: Single-Ended
• Output Frequency: 650MHz
• Output Logic Level: LVDS
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.465V
• Package Type: TSSOP
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Signal Type: LVCMOS/LVTTL
• Mounting: Surface Mount
• Pin Count: 20
• Lead Free Status / RoHS Status: Compliant

Pin Description
Notes:
1.
Pin Characteristics
Control Input Function Table
Notes:
1.
GND
CLK_EN
CLK_SEL
CLK
Xtal1,
Xtal2
NC
OE
V
Q
Q
Q
Q
CC
3
2
1
0
R_pulldown
,
, nQ2
,
,
I = Input, O = Output, P = Power supply connection, I_PD = Input with pull down, I_PU = Input with pull up
Name
After CLK_EN switches, the clock outputs are disabled or enabled following a rising and falling input clock edge as show below.
R_pullup
n
n
n
Symbol
Q
Q
Q
OE
C
1
1
1
1
1
0
3
0
IN
1, 9, 13
10, 13,
11, 12
14, 15
16, 17
19, 20
Pin #
6, 7
18
2
3
4
5
8
Input Pulldown Resistance
CLK_EN
Input Pullup Resistance
Input Capacitance
0
0
1
1
x
Parameter
I_PU
I_PD
I_PD
I_PU
Type
O
O
O
O
P
P
Inputs
CLK_SEL
Connect to Ground
Synchronizing clock enable. When high, clock outputs follow clock input. When low, Q
outputs are forced low,
pull up.
Clock select input. When high, selects CLK
LVCMOS/LVTTL level with 80kΩ pull down.
LVCMOS / LVTTL clock input
Crystal input and output
No internal connection.
Output Enable. Controls outputs Q
Connect to 3.3V
Differential output pair, LVDS interface level.
Differential output pair, LVDS interface level.
Differential output pair, LVDS interface level.
Differential output pair, LVDS interface level.
0
1
0
1
x
Conditions
Selected Source
Xtal1, Xtal2
Xtal1, Xtal2
CLK
CLK
n
Q
2
x
outputs are forced high. LVCMOS/LVTTL level with 80KΩ
0
,
n
Q
Crystal/LVCMOS to LVDS Fanout Buffer
Description
Min.
0
through Q
Diasbled: Low
Disabled: Low
1
input. When low, selects CLK
Enabled
Enabled
Q
HiZ
0
:Q
3
,
n
3
Q
Typ.
3.
80
80
6
Outputs
3.3V Low Skew 1-to-4
Max.
Diasbled: High
Disabled: High
n
Enabled
Enabled
PI6C48545-11
Q
0
PS8769
HiZ
0
input.
:
n
Q
3
Units
KΩ
pF
06/23/05
x