GD82541ER S L7CR Intel, GD82541ER S L7CR Datasheet

GD82541ER S L7CR

Manufacturer Part Number

GD82541ER S L7CR

Description

Manufacturer

Intel

Datasheet

1.GD82541ER_S_L7CR.pdf (1 pages)

Specifications of GD82541ER S L7CR

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Features and Benefits

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The Intelligent Way to Connect:

The Intel ® 82541ER Gigabit Ethernet Controller provides optimized Gigabit networking

for PCI designs. This highly efficient controller, with enhanced power management,

consumes less than 1.0W of power at Gigabit speeds. When no signal is detected on the

wire, the controller reduces power consumption by switching to 100 or 10Mbps and

powering down the physical

controller automatically negotiates the connection to Gigabit, if available.

The Intel 82541ER combines Intel

integrated state

specifications for Bit Error Rate performance. In addition, the controller provides a direct

Peripheral Component Interconnect (PCI) designed to be compliant with the PCI 2.3 bus

up to 66MHz. Packaged in a 15x15mm PBGA, the Intel 82541ER Gigabit Ethernet

Controller is footprint

Controllers, and Intel

a flexible Gigabit Ethernet or Fast Ethernet implementation on the same motherboard

layout.

The Intel 82541ER Gigabit Ethernet Controller architecture is optimized to deliver both

high -performance networking and PCI bus efficiency with the lowest power and smallest

size. Using state logic design with a pipelined DMA Unit and 128

fastest performance, the 82541ER controller handles Gigabit Ethernet traffic with low

network latency and minimal internal processing overhead. The controller

includes independent transmit and receive queues to limit PCI bus traffic, and a PCI

interface that maximizes the use of bursts for efficient bus usage. A 64KB, on

buffer maintains superior performance as available PCI bandwidth changes.

Advanced interrupt moderation hardware manages interrupts generated by the 82541ER

controller to further improve system efficiency. In addition, using hardware acceleration,

the controller also offloads tasks from the host processor, such as TCP/UDP/IP checksum

calculations and TCP segmentation.

Features and Benefits

Key Applications

The Intel 82541ER Gigabit Ethernet Controller is designed for use in the following

applications:

PCI Bus Features

PCI revision 2.3, 32

CLKRUN# Signal

Gigabit MAC Features

64KB configurable RX and TX packet FIFO

IEEE 802.3x compliant flow control support

Programmable host memory receive

buffers (256B to 16KB)

Low -latency transmit and receive queues

Gigabit PHY Features

IEEE 802.3ab Auto

State -of -the -art DSP/analog architecture

PHY detects polarity

PHY supports 2 pair and 3 pair cable

downshift

Host Offloading Features

Transmit TCP segmentation, and IP, TCP,

and UDP checksum off

Interrupt moderation controls

Jumbo frame support up to 16KB

Power Management Features

Compliance with PCI Power Management

v1.1/ACPI v2.0

Automatic link speed switching from

1000Mbps down to 10 or 100Mbps in

standby

Smart Power Down mode when no signal

is detected on the wire

Additional Features

Four programmable LED outputs

On -chip power regulator control circuitry

Internal PLL for clock generation using a

25MHz crystal or a 25MHz oscillator

BIOS LAN Disable Pin

Play

Printer LAN Connections

Security Appliances for Enterprise Networking (VPN, firewall, intrusion detection

systems)

Industrial PCs, Interactive Clients (POS, kiosk, ATM, gaming)

Communications and networking devices requiring improved performance over

10/100

Overview

RSS

›

Enhanced power management for reduced power

applications

High -performance PHY technology meets IEEE 802.3ab

specifications

Footprint compatibility with other Intel

for flexible designs

Products

Support

Jobs

Products

GD82541ER

*Trademarks

Technical

›

-of -the -art PHY technology, which meets or exceeds IEEE 802.3ab

Networking & Communications

Investor Relations

-Negotiation

-bit, 33/66MHz

-compatible with the Intel

® 82562EX and 82562EZ devices. Footprint compatibility allows for

Key Applications

About Intel

-loading

Technology

-layer circuitry (PHY). When a signal is detected, the

Privacy

’s fifth -generation Gigabit MAC design with fully

Where to

Change Location

Press Room

Communities

›

® PRO Connections

Application flexibility for embedded board

designs

PCI clock suspension for low

designs

Reduced frame loss due to receive FIFO

overrun

Efficient usage of system resources

Network packets handled without waiting

or buffer overflow

Automatic link configuration including

speed, duplex, and flow control

Easier network installation and

maintenance

Controller adapts to sub

plant

Reduces number of interrupts generated

by RX and TX operations, resulting in lower

CPU utilization

High throughput for large data transfers

on networks supporting jumbo frames

PCI power management capabilities for

embedded applications

Enables very low power consumption

Customizable indications for link speed,

activity, duplex, collisions, and port ID on

each port

Simplified low -cost power supply design

Lower component count and cost

Enables low -power LAN disable via BIOS

Ethernet

® 82551ER and 82551QM Fast Ethernet

No external FIFO memory requirements

FIFO size tunable to the application

Implements digital adaptive

equalization, echo, cross

baseline wander cancellation

Robust 1000Mbps performance in noisy

environments

Increased throughput and lower CPU

utilization

Compatible with large send offload on

RX and TX

Supports power

software assistance

Low power in standby states

82541ER

Downloads

-down states without

-bit -wide buses for the

-standard cable

-talk and

’s architecture

-power

-chip packet

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