DS92LV090ATVEH/HAPB National Semiconductor, DS92LV090ATVEH/HAPB Datasheet - Page 5
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DS92LV090ATVEH/HAPB
Manufacturer Part Number
DS92LV090ATVEH/HAPB
Description
Manufacturer
National Semiconductor
Datasheet
1.DS92LV090ATVEHHAPB.pdf
(12 pages)
Specifications of DS92LV090ATVEH/HAPB
Number Of Elements
1
Operating Supply Voltage (typ)
3.3V
Differential Output Voltage
460mV
Propagation Delay Time
3.2ns
Power Dissipation
1.74W
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
LQFP
Number Of Receivers
1
Number Of Drivers
1
Lead Free Status / RoHS Status
Not Compliant
DIFFERENTIAL DRIVER TIMING REQUIREMENTS
t
t
t
t
t
t
t
t
t
t
t
DIFFERENTIAL RECEIVER TIMING REQUIREMENTS
t
t
t
t
t
t
t
t
t
t
t
PHLD
PLHD
SKD1
SKD2
SKD3
TLH
THL
PHZ
PLZ
PZH
PZL
PHLD
PLHD
SDK1
SDK2
SDK3
TLH
THL
PHZ
PLZ
PZH
PZL
Symbol
AC Electrical Characteristics
Over recommended operating supply voltage and temperature ranges unless otherwise specified (Note 6)
Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices
should be operated at these limits. The table of “Electrical Characteristics” provides conditions for actual device operation.
Note 2: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to ground unless otherwise specified
except V
Note 3: All typicals are given for V
Note 4: ESD Rating: HBM (1.5 kΩ, 100 pF) > 4.5 kV EIAJ (0Ω, 200 pF) > 300V.
Note 5: C
Note 6: Generator waveforms for all tests unless otherwise specified: f = 25 MHz, Z
minimum skew, data input edge rates should be equal to or faster than 1ns/V; control signals equal to or faster than 3ns/V. In general, the faster the input edge
rate, the better the AC performance.
Note 7: The DS92LV090A functions within datasheet specification when a resistive load is applied to the driver outputs.
Note 8: Propagation delays are guaranteed by design and characterization.
Note 9: t
Note 10: Only one output at a time should be shorted, do not exceed maximum package power dissipation capacity.
Note 11: V
Note 12: Chip to Chip skew is the difference in differential propagation delay between any channels of any devices, either edge.
Note 13: Channel to Channel skew is the difference in driver output or receiver output propagation delay between any channels within a device, either edge.
OD
SKD1
L
OH
, ΔV
includes probe and fixture capacitance.
Differential Prop. Delay High to Low (Note 8)
Differential Prop. Delay Low to High (Note 8)
Differential Skew |t
Chip to Chip Skew (Note 12)
Channel to Channel Skew (Note 13)
Transition Time Low to High
Transition Time High to Low
Disable Time High to Z
Disable Time Low to Z
Enable Time Z to High
Enable Time Z to Low
Differential Prop. Delay High to Low (Note 8)
Differential Prop Delay Low to High (Note 8)
Differential Skew |t
Chip to Chip Skew (Note 12)
Channel to Channel Skew (Note 13)
Transition Time Low to High
Transition Time High to Low
Disable Time High to Z
Disable Time Low to Z
Enable Time Z to High
Enable Time Z to Low
|t
failsafe terminated test performed with 27Ω connected between RI+ and RI− inputs. No external voltage is applied.
PHLD
OD
and V
–t
PLHD
ID
| is the worse case skew between any channel and any device over recommended operation conditions.
.
CC
PHLD
PHLD
= +3.3V and T
Parameter
–t
–t
PLHD
PLHD
| (Note 9)
| (Note 9)
A
= +25°C, unless otherwise stated.
5
R
Figures 2, 3,
C
R
Figures 4, 5,
C
Figures 6, 7,
C
R
Figures 8, 9,
C
O
L
L
L
L
L
L
L
= 50Ω, t
= 27Ω,
= 10 pF
= 27Ω,
= 10 pF
= 35 pF
= 500Ω,
= 35 pF
Conditions
r
, t
f
= <1.0 ns (0%–100%). To ensure fastest propagation delay and
Min
0.6
0.6
1.6
1.6
0.25
0.35
Typ
1.4
1.4
0.6
0.5
2.4
2.4
1.5
1.5
4.5
3.5
3.5
3.5
80
80
3
3
3
3
Max
0.45
0.60
2.2
2.2
1.6
1.2
1.2
3.2
3.2
1.6
2.5
2.5
10
8
8
8
8
8
8
8
www.national.com
Units
ns
ns
ps
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ps
ns
ns
ns
ns
ns
ns
ns
ns