HI-3282PQI Holt Integrated Circuits, HI-3282PQI Datasheet
HI-3282PQI
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HI-3282PQI Summary of contents
Page 1
... BD14 - 8 BD13 - 9 BD12 - 10 BD11 - 11 44-Pin Plastic Quad Flat Pack (PQFP) (See page 10 for additional pin configurations) HOLT INTEGRATED CIRCUITS www.holtic.com HI-3282 ARINC 429 (Top View N N CWSTR X HI-3282PQI 30 - ENTX HI-3282PQI- 429DO HI-3282PQT 28 -429DO 27 - TX/R & PL2 HI-3282PQT- PL1 24 - BD00 23 - BD01 02/09 ...
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... Latch enable for byte 1 entered from data bus to transmitter FIFO. Latch enable for byte 2 entered from data bus to transmitter FIFO. Must follow Transmitter ready flag. Goes low when ARINC word loaded into FIFO. Goes high after transmission and FIFO empty. "ONES" data output from transmitter. ...
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... FUNCTIONAL DESCRIPTION CONTROL WORD REGISTER The HI-3282 contains 11 data flip flops whose D inputs are con- nected to the data bus and clocks connected to flip flop provides options to the user as follows: DATA BUS FUNCTION CONTROL PIN BD04 PAREN Enables parity bit insertion into ...
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... INTERNAL LIGHTNING PROTECTION (-10 Only) The HI-3282-10 configurations are similar to the HI-3282 with the LOW SPEED exception that it allows an external 10K to 15K ohm resistor to be added in series with each ARINC input without affecting the ARINC input thresholds. This option is especially useful in 10 ± ...
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... TRANSMITTER PARITY Control register bit BD04 (PAREN) enables parity bit insertion into transmitter data bit 32. Parity is always inserted if DBCEN is open or high. If DBCEN is low, logic 0 on PAREN inserts data on bit 32, and logic 1 on PAREN inserts parity on bit 32. DBCEN CONTROL REGISTER BD04, BD12 ...
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... SEL input. During repeater operation however, the lower byte of the data word must be read first. This is necessary because, as the data is being read also being loaded into the FIFO and the transmitter FIFO is always EN, the byte loaded with the lower byte of the data word first ...
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... ENTX t ENDAT 429DO or 429DO 429DI BIT 32 D D/R D/REN EN t SELEN SEL DON'T CARE t ENPL PL1 PL2 TX/R ENTX 429DO HI-3282 TRANSMITTER OPERATION BYTE 1 VALID t DWSET t DWHLD PL12 TRANSMITTING DATA ARINC BIT DATA DATA BIT 1 BIT 2 REPEATER OPERATION TIMING t END ENEN ...
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... H Input Sink I IH Input Source I IL Differential GND Vcc C H Input Voltage Input Voltage Input Sink I IH Input Source I IL Input Voltage Input Voltage Input Sink I IH Input Source I IL DCBEN Pin Output Sink Output Source OUT Output Sink ...
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... Delay - TRANSMISSION TIMING Spacing - Delay - ENTX HIGH to 429DO or Delay - ENTX HIGH to 429DO or Delay - 32nd ARINC Bit to TX/R HIGH Spacing - TX/R HIGH to ENTX L0W REPEATER OPERATION TIMING Delay - TX/R LOW to ENTX HIGH Master Reset Pulse Width ARINC Data Rate and Bit Timing ...
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... BD02 BD10 17 24 BD03 BD09 18 23 BD04 BD08 19 22 BD05 BD07 21 20 GND BD06 HI-3282CDI / HI-3282CDT / HI-3282CDM 40-PIN CERAMIC SIDE-BRAZED DIP 39 N/C 38 N/C 37 CWSTR 36 ENTX 35 429DO 34 429DO 33 TX/R 32 PL2 31 PL1 30 BD00 29 BD01 HI-3282CLI / HI-3282CT / HI-3282CLM HI-3282CLI-10 / HI-3282CT-10 / HI-3282CLM-10 44-Pin Leadless Chip Carrier (LCC) ...
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... I T -55°C TO +125° -55°C TO +125°C M PACKAGE DESCRIPTION 40 PIN CERAMIC SIDE BRAZED DIP (40C) 44 PIN CERAMIC LEADLESS CHIP CARRIER (44S) INPUT SERIES RESISTANCE BUILT-IN REQUIRED EXTERNALLY 35K Ohm 25K Ohm 10K to 15K Ohm PACKAGE DESCRIPTION Tin / Lead (Sn / Pb) Solder F 100% Matte Tin (Pb-free RoHS compliant) ...
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... REVISION HISTORY Revision Date Description of Change DS3282, Rev. L 02/24/09 Clarified the temperature ranges, series resistance values for “-10” devices, and Note (1) in the Ordering Information. HI-3282 HOLT INTEGRATED CIRCUITS 12 ...
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... SQ. .173 ±.008 (4.394 ±.203) BSC = “Basic Spacing between Centers” is theoretical true position dimension and has no tolerance. (JEDEC Standard 95) HI-3282 PACKAGE DIMENSIONS 2.020 MAX (51.308 MAX) .050 TYP (1.270 TYP) .085 ±.009 (2.159 ±.229) ...
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... SQ. See Detail A .063 MAX. (1.6) BSC = “Basic Spacing between Centers” is theoretical true position dimension and has no tolerance. (JEDEC Standard 95) 44-PIN CERAMIC LEADLESS CHIP CARRIER .020 INDEX (.508) PIN 1 .651 ±.011 (16.535 ±.279) SQ. BSC = “Basic Spacing between Centers” ...