PI6C48535-11LEX Pericom Semiconductor, PI6C48535-11LEX Datasheet

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PI6C48535-11LEX

Manufacturer Part Number
PI6C48535-11LEX
Description
Clock Buffer 2.5V 1:16 LVPECL Fanout Buffer
Manufacturer
Pericom Semiconductor
Type
Clock Driverr
Datasheet

Specifications of PI6C48535-11LEX

Number Of Clock Inputs
2
Mode Of Operation
Single-Ended
Output Frequency
500MHz
Output Logic Level
LVPECL
Operating Supply Voltage (min)
3V
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Package Type
TSSOP
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Signal Type
LVCMOS/LVTTL
Mounting
Surface Mount
Pin Count
20
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PI6C48535-11LEX
Manufacturer:
PERICOM
Quantity:
20 000
Features
Block Diagram
CLK_SEL
CLK_EN
Maximum operation frequency: 500MHz
4 pair of differential LVPECL outputs
Selectable CLK and crystal inputs
CLK accepts LVCMOS, LVTTL input level
Output Skew: 30ps (maximum)
Part-to-part skew: 150ps (maximum)
Propagation delay: 1.5ns (maximum)
3.3V power supply
Pin-to-pin compatible to ICS8535-11
Operating Temperature: -40
Packaging (Pb-free & Green available):
- 20-pin TSSOP (L)
Xtal1
Xtal2
CLK
08-0257
0
1
o
C to 85
LE
D
Q
o
C
Q
n
Q
n
Q
n
Q
n
Q
Q
Q
Q
0
1
2
3
0
1
2
3
Crystal/LVCMOS to LVPECL Fanout Buffer
1
Description
The PI6C48535-11 is a high-performance low-skew LVPECL
fanout buffer. PI6C48535-11 features selectable of single-ended
clock or crystal inputs and translates to four LVPECL outputs.
The CLK input accepts LVCMOS or LVTTL signals. The outputs
are synchronized with input clock during asynchronous assertion
/deassertion of CLK_EN pin. PI6C48535-11 is ideal for crystal or
LVCMOS/LVTTL to LVPECL translation. Typical clock transla-
tion and distribution applications are data-communications and
telecommunications.
Pin Diagram
CLK_SEL
CLK_EN
Xtal
Xtal
CLK
V
V
NC
NC
NC
CC
EE
1
2
1
2
3
4
5
6
7
8
9
10
3.3V Low Skew 1-to-4
PI6C48535-11
20
19
18
17
16
15
14
13
12
11
PS9738A
Q
N
V
Q
N
Q
N
V
Q
N
Q
Q
Q
Q
CC
CC
0
1
2
3
0
1
2
3
10/13/08

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PI6C48535-11LEX Summary of contents

Page 1

... LVPECL outputs. The CLK input accepts LVCMOS or LVTTL signals. The outputs are synchronized with input clock during asynchronous assertion /deassertion of CLK_EN pin. PI6C48535-11 is ideal for crystal or LVCMOS/LVTTL to LVPECL translation. Typical clock transla- tion and distribution applications are data-communications and telecommunications ...

Page 2

... Differential output pair, LVPECL interface level. Differential output pair, LVPECL interface level. Differential output pair, LVPECL interface level. Conditions Selected Source CLK Diasbled: Low Xtal1, Xtal2 Disabled: Low CLK Xtal1, Xtal2 2 PI6C48535-11 3.3V Low Skew 1-to-4 Description Min. Typ. Max Outputs Q :Q ...

Page 3

... Power Supply Current EE 08-0257 Crystal/LVCMOS to LVPECL Fanout Buffer Enabled Enabled Outputs HIGH LOW Conditions Referenced to GND Referenced to GND Referenced to GND Conditions 3 PI6C48535-11 3.3V Low Skew 1-to-4 Min. Typ. Max. 4.6 -0.5 V +0.5V CC -0.5 V +0.5V CC -65 150 Min. Typ. Max. 3.0 3.3 3.6 ...

Page 4

... Min Typ 2 V -0.3 -5 -150 Min. Typ 0.6 Typ. Max. Fundamental Min. Typ. Max. 500 1.0 1.5 150 100 400 48 1000 PI6C48535-11 Max Units +0 0.8 150 5 μA Max. Units -0 1.0 Units MHz Ω pF Units MHz ppm PS9738A 10/13/08 ...

Page 5

... Pericom Semiconductor Corporation 3545 N. 1st Street, San Jose, CA 95134 1-800-435-2335 DESCRIPTION: 20-Pin, 173-Mil Wide, TSSOP PACKAGE CODE: L Package Code L 5 PI6C48535-11 3.3V Low Skew 1-to-4 DOCUMENT CONTROL NO. REVISION: E DATE: 03/09/05 .004 .008 0.45 .018 0.75 .030 .238 ...

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