IDTICS853031AYLF IDT, Integrated Device Technology Inc, IDTICS853031AYLF Datasheet - Page 13

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IDTICS853031AYLF

Manufacturer Part Number
IDTICS853031AYLF
Description
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Driverr
Datasheet

Specifications of IDTICS853031AYLF

Number Of Clock Inputs
2
Mode Of Operation
Differential
Output Frequency
>1600MHz
Output Logic Level
ECL/LVPECL
Operating Supply Voltage (min)
-2.375/2.375V
Operating Supply Voltage (typ)
-2.5/-3.3/3.3V
Operating Supply Voltage (max)
-3.465/3.465V
Package Type
LQFP
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Lead Free Status / RoHS Status
Compliant
T
IDT
The clock layout topology shown below is a typical termina-
tion for LVPECL outputs. The two different layouts men-
tioned are recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that
generate ECL/LVPECL compatible outputs. Therefore, termi-
nating resistors (DC current path to ground) or current sources
must be used for functionality. These outputs are designed to
ERMINATION FOR
ICS853031
LOW SKEW, 1-TO-9, DIFFERENTIAL-TO-2.5, 3.3V LVPECL/ECL FANOUT BUFFER
RTT =
/ ICS
((V
F
1-TO-9, 2.5V, 3.3V LVPECL/ECL FANOUT BUFFER
FOUT
IGURE
OH
+ V
OL
6A. LVPECL O
) / (V
3.3V LVPECL O
1
CC
Z
Z
– 2)) – 2
o
o
= 50
= 50
Z
o
50
UTPUT
UTPUTS
T
RTT
ERMINATION
50
V
CC
FIN
- 2V
13
drive 50 transmission lines. Matched impedance techniques
should be used to maximize operating frequency and mini-
mize signal distortion. Figures 6A and 6B show two different
layouts which are recommended only as guidelines. Other
suitable clock layouts may exist and it would be recommended
that the board designers simulate to guarantee compatibility
across all printed circuit and clock component process varia-
tions.
FOUT
F
IGURE
6B. LVPECL O
Z
Z
o
o
= 50
= 50
ICS853031AY REV. C AUGUST 12, 2008
125
84
UTPUT
3.3V
125
84
T
ERMINATION
FIN

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