IDTICS85352AYI IDT, Integrated Device Technology Inc, IDTICS85352AYI Datasheet - Page 13

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IDTICS85352AYI

Manufacturer Part Number
IDTICS85352AYI
Description
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Multiplexerr
Datasheet

Specifications of IDTICS85352AYI

Number Of Clock Inputs
2
Mode Of Operation
Differential
Output Frequency
700MHz
Output Logic Level
LVPECL
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.465V
Package Type
TQFP EP
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Lead Free Status / RoHS Status
Not Compliant
ICS85352I Data Sheet
ICS85352AYI REVISION B JULY 6, 2010
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS85352I.
Equations and example calculations are also provided.
1.
The total power dissipation for the ICS85352I is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
Total Power_
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and it directly affects the reliability of the device.
The maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the
bond wire and bond pad temperature remains below 125°C.
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ
flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 22.6°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (multi-layer).
Table 6. Thermal Resistance
Linear Feet per Minute
Multi-Layer PCB, JEDEC Standard Test Boards
Power Dissipation.
Power (core)
Power (outputs)
If all outputs are loaded, the total power is 12 * 30mW = 360mW
The equation for Tj is as follows: Tj = θ
Tj = Junction Temperature
θ
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
85°C + 0.949W * 22.6°C/W = 106.4°C. This is below the limit of 125°C.
JA
A
= Ambient Temperature
= Junction-to-Ambient Thermal Resistance
MAX
(3.3V, with all outputs switching) = 589.05mW + 360mW = 949.05mW
MAX
MAX
= V
= 30mW/Loaded Output pair
CC_MAX
θ
JA
* I
for 48 Lead TQFP, Forced Convection
EE_MAX
CC
= 3.3V + 5% = 3.465V, which gives worst case results.
JA
= 3.465V * 170mA = 589.05mW
* Pd_total + T
θ
JA
A
27.6°C/W
by Velocity
13
0
22.6°C/W
12 BIT, 2-TO-1, 3.3V, 2.5V LVPECL CLOCK BUFFER
200
JA
must be used. Assuming a moderate air
©2010 Integrated Device Technology, Inc.
20.78°C/W
500

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