TSX5070FN STMicroelectronics, TSX5070FN Datasheet - Page 5

• Manufacturer Part Number: TSX5070FN
• Manufacturer: STMicroelectronics
• Type: PCMr

Specifications of TSX5070FN

• Number Of Channels: 1
• Gain Control: Programmable
• Number Of Adc's: 1
• Number Of Dac's: 1
• Package Type: PLCC
• Operating Supply Voltage (typ): ±5V
• Number Of Adc Inputs: 1
• Number Of Dac Outputs: 1
• Operating Supply Voltage (max): ±5.25V
• Operating Supply Voltage (min): ±4.75V
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

TRANSMIT SECTION
RECEIVE SECTION
Name
Name
VF
TS
TS
VF
FS
D
D
FS
D
D
X
X
R
R
R
X
X
X
0
1
0
1
X
R
0
1
0
I
Type
Type
Pin
Pin
0
0
0
0
0
I
I
I
I
I
TS5070
TS5070
FN
FN
22
28
18
19
20
21
10
8
2
9
TS5071
TS5071
15
20
13
14
N
N
–
–
6
2
7
–
Transmit
Frame Sync.
Transmit
Analog
Transmit Data
Transmit
Time–slot
Receive Frame
Sync.
Receive Analog
Receive Data
Function
Function
Normally a pulse or squarewave waveform with an 8 kHz
repetition rate is applied to this input to define the start of
the transmit time-slot assigned to this device (non-delayed
data mode) or the start of the transmit frame (delayed
data mode using the internal time-slot assignment
counter).
This is a high–impedance input. Voice frequency signals
present on this input are encoded as an A–law or –law
PCM bit stream and shifted out on the selected D
D
all devices. These transmit data TRI–STATE
remain in the high impedance state except during the
assigned transmit time–slot on the assigned port, during
which the transmit PCM data byte is shifted out on the
rising edges of BCLK.
TS
TS
outputs are floating in a high impedance state except
when a time–slot is active on one of the D
the apppropriate TS
enable a backplane line–driver. Should be strapped to
ground (GND) when not used.
Normally a pulse or squarewave waveform with an 8 kHz
repetition rate is applied to this input to define the start of
the receive time–slot assigned to this device (non-delayed
frame mode) or the start of the receive frame (delayed
frame mode using the internal time-slot assignment
counter.
The receive analog power amplifier output, capable of
driving load impedances as low as 300
the peak overload level required). PCM data received on
the assigned D
as voice frequency signals.
D
all devices. These receive data input(s) are inactive
except during the assigned receive time–slot of the
assigned port when the receive PCM data is shifted in on
the falling edges of BCLK.
X
R
1 is available on the TS5070 only, D
X
X
1 is available on the TS5070 only, D
1 is available on the TS5070 only.
0 is available on all devices. Normally these opendrain
R
pin is decoded and appears at this output
X
output pulls low to
Description
Description
TS5070 - TS5071
X
R
0 is available on
0 is available on
X
(depending on
outputs, when
outputs
X
pin.
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