DS25BR100TSDX National Semiconductor, DS25BR100TSDX Datasheet - Page 7
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DS25BR100TSDX
Manufacturer Part Number
DS25BR100TSDX
Description
Manufacturer
National Semiconductor
Datasheet
1.DS25BR100TSDX.pdf
(16 pages)
Specifications of DS25BR100TSDX
Number Of Elements
1
Input Type
CMOS
Operating Supply Voltage (typ)
3.3V
Differential Input High Threshold Voltage
100mV
Diff. Input Low Threshold Volt
-100mV
Output Type
Repeater
Differential Output Voltage
450mV
Transmission Data Rate
390.625MBps
Propagation Delay Time
0.465ns
Power Dissipation
2.08W
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
8
Number Of Receivers
1
Number Of Drivers
1
Lead Free Status / RoHS Status
Not Compliant
JITTER PERFORMANCE WITH PE = MEDIUM AND EQ = MEDIUM (Figures 5, 7)
t
t
t
t
t
t
Symbol
RJ1D
RJ2D
DJ1D
DJ2D
TJ1D
TJ2D
Note 11: The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as otherwise modified
or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not guaranteed.
Note 12: Typical values represent most likely parametric norms for V
product characterization and are not guaranteed.
Note 13: Specification is guaranteed by characterization and is not tested in production.
Note 14: t
the same channel.
Note 15: t
devices at the same V
Note 16: Measured on a clock edge with a histogram and an acummulation of 1500 histogram hits. Input stimulus jitter is subtracted geometrically.
Note 17: Tested with a combination of the 1100000101 (K28.5+ character) and 0011111010 (K28.5- character) patterns. Input stimulus jitter is subtracted
algebraically.
Note 18: Measured on an eye diagram with a histogram and an acummulation of 3500 histogram hits. Input stimulus jitter is subtracted.
Random Jitter (RMS Value)
Input Test Channel E
Output Test Channel B
(Note 16)
Deterministic Jitter (Peak to Peak)
Input Test Channel E
Output Test Channel B
(Note 17)
Total Jitter (Peak to Peak)
Input Test Channel E
Output Test Channel B
(Note 18)
SKD1
SKD2
, |t
, Part to Part Skew, is defined as the difference between the minimum and maximum differential propagation delays. This specification applies to
PLHD
− t
CC
PHLD
and within 5°C of each other within the operating temperature range.
|, is the magnitude difference in differential propagation delay time between the positive going edge and the negative going edge of
Parameter
CC
= +3.3V and T
V
V
Clock (RZ)
PE = 1, EQ = 1
V
V
K28.5 (NRZ)
PE = 1, EQ = 1
V
V
PRBS-23 (NRZ)
PE = 1, EQ = 1
ID
CM
ID
CM
ID
CM
= 350 mV
= 350 mV
= 350 mV
= 1.2V
= 1.2V
= 1.2V
7
A
= +25°C, and at the Recommended Operation Conditions at the time of
Conditions
2.5 Gbps
3.125 Gbps
2.5 Gbps
3.125 Gbps
2.5 Gbps
3.125 Gbps
Min
0.13
0.19
Typ
0.5
0.5
41
46
Max
0.20
0.30
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77
98
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Units
UI
UI
ps
ps
ps
ps
P-P
P-P