DS25BR110TSDX National Semiconductor, DS25BR110TSDX Datasheet
DS25BR110TSDX
Specifications of DS25BR110TSDX
Related parts for DS25BR110TSDX
DS25BR110TSDX Summary of contents
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... Typical Application © 2007 National Semiconductor Corporation Features ■ 3.125 Gbps low jitter, high noise immunity, low power operation ■ ...
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Block Diagram Pin Diagram Pin Descriptions Pin Name Pin Name EQ0 1 IN+ 2 IN- 3 EQ1 OUT- 6 OUT+ 7 VCC 8 GND DAP Control Pins (EQ0 and EQ1) Truth Tables EQ1 ...
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... Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage ( LVCMOS Input Voltage (EQ0, EQ1) LVDS Input Voltage (IN+, IN−) LVDS Differential Input Voltage ((IN+) - (IN−)) LVDS Output Voltage (OUT+, OUT−) LVDS Differential Output Voltage ((OUT+) - (OUT− ...
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Symbol Parameter LVDS INPUT DC SPECIFICATIONS (IN+, IN-) V Input Differential Voltage ID V Differential Input High Threshold TH V Differential Input Low Threshold TL V Common Mode Voltage Range CMR I Input Current IN C Input Capacitance IN R ...
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AC Electrical Characteristics Over recommended operating supply and temperature ranges unless otherwise specified. (Notes 9, 10) Symbol Parameter LVDS OUTPUT AC SPECIFICATIONS (OUT+, OUT-) t Differential Propagation Delay High to Low PHLD t Differential Propagation Delay Low to High PLHD ...
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Symbol Parameter JITTER PERFORMANCE WITH EQ = LOW (Figures 5 and RJ1B Random Jitter (RMS Value) t RJ2B Test Channel D (Note 14) t DJ1B Deterministic Jitter (Peak to Peak) t DJ2B Test Channel D (Note 15) ...
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DC Test Circuits AC Test Circuits and Timing Diagrams FIGURE 1. Differential Driver DC Test Circuit FIGURE 2. Differential Driver AC Test Circuit FIGURE 3. Propagation Delay Timing Diagram FIGURE 4. LVDS Output Transition Times 7 30005320 30005321 30005322 30005323 ...
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Equalization Test Circuits Test Channel Loss Characteristics The test channel was fabricated with Polyclad PCL-FR-370-Laminate/PCL-FRP-370 Prepreg materials (Dielectric constant of 3.7 and Loss Tangent of 0.02). The edge coupled differential striplines have the following geometries: Trace Width ( ...
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Device Operation INPUT INTERFACING The DS25BR110 accepts differential signals and allows simple coupling. With a wide common mode range, the DS25BR110 can be DC-coupled with all common differential drivers (i.e. LVPECL, LVDS, CML). The following three figures ...
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OUTPUT INTERFACING The DS25BR110 outputs signals compliant to the LVDS standard. It can be DC-coupled to most common differential receivers. The following figure illustrates typical DC-coupled interface to common differential receivers and assumes that the receivers have high impedance inputs. ...
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Typical Performance Maximum Data Rate as a Function of CAT5e (Belden 1700A) Length Maximum Data Rate as a Function of CAT7 (Siemon Tera) Length Maximum Data Rate as a Function of CAT5e (Belden 1700A) Length DS25BR120 Used as a Driver ...
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A 2.5 Gbps NRZ PRBS-7 After 70" Differential FR-4 Stripline V:100 mV / DIV, H: DIV A 3.125 Gbps NRZ PRBS-7 After 70" Differential FR-4 Stripline V:100 mV / DIV, H: DIV Total Jitter as a ...
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Total Jitter as a Function of Data Rate Total Jitter as a Function of Input Amplitude Total Jitter as a Function of Input Amplitude 30005343 Total Jitter as a Function of Data Rate Total Jitter as a Function of Input ...
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Physical Dimensions (See AN-1187 for PCB Design and Assembly Recommendations) www.national.com inches (millimeters) unless otherwise noted Order Number DS25BR110TSD NS Package Number SDA08A 14 ...
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Notes 15 www.national.com ...
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