XC6VSX475T-2FFG1156E Xilinx Inc, XC6VSX475T-2FFG1156E Datasheet - Page 19
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XC6VSX475T-2FFG1156E
Manufacturer Part Number
XC6VSX475T-2FFG1156E
Description
IC FPGA VIRTEX 1156FCBGA
Manufacturer
Xilinx Inc
Series
Virtex™ 6 SXTr
Specifications of XC6VSX475T-2FFG1156E
Number Of Logic Elements/cells
476160
Number Of Labs/clbs
37200
Total Ram Bits
39223296
Number Of I /o
600
Number Of Gates
-
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1156-BBGA, FCBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
XC6VSX475T-2FFG1156I
XC6VSX475T-2FFG1156I
XC6VSX475T-2FFG1156I
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC6VSX475T-2FFG1156E
Manufacturer:
Xilinx Inc
Quantity:
10 000
Table 35: GTH Transceiver User Clock Switching Characteristics
Table 36: GTH Transceiver Transmitter Switching Characteristics
DS152 (v3.2) April 1, 2011
Product Specification
Notes:
1.
Notes:
1.
2.
3.
F
F
F
F
T
T
T
Transmitter Output Jitter
TJ
DJ
TJ
DJ
TJ
DJ
TJ
DJ
TJ
DJ
Symbol
TXOUT
RXOUT
TXIN
RXIN
RTX
FTX
LLSKEW
11.18
10.3125
9.953
2.667
2.488
11.18
10.3125
9.953
2.667
2.488
Clocking must be implemented as described in UG371:Virtex-6 FPGA GTH Transceivers User Guide.
These values are NOT intended for protocol specific compliance determinations.
All jitter values are based on a bit-error ratio of 1e
Rise and fall times are specified at the transmitter package balls.
Symbol
TXUSERCLKOUT maximum frequency
RXUSERCLKOUT maximum frequency
TXUSERCLKIN maximum frequency
RXUSERCLKIN maximum frequency
TX Rise time
TX Fall time
TX lane-to-lane skew
Total Jitter
Deterministic Jitter
Total Jitter
Deterministic Jitter
Total Jitter
Deterministic Jitter
Total Jitter
Deterministic Jitter
Total Jitter
Deterministic Jitter
(1)(2)
Description
Description
-12
.
16-bit data path
20-bit data path
32-bit data path
40-bit data path
64-bit data path
80-bit data path
64B/66B-bit data path
16-bit data path
20-bit data path
32-bit data path
40-bit data path
64-bit data path
80-bit data path
64B/66B-bit data path
www.xilinx.com
Virtex-6 FPGA Data Sheet: DC and Switching Characteristics
within one GTH Quad
Conditions
10.3125 Gb/s
11.181 Gb/s
9.953 Gb/s
2.667 Gb/s
2.488 Gb/s
Condition
20%–80%
80%–20%
(1)
Min
350
350
350
280
350
280
175
140
170
350
280
350
280
175
140
170
-3
–
–
–
–
–
–
–
–
–
–
–
–
–
Speed Grade
50
50
Typ
350
350
350
280
350
280
175
140
170
350
280
350
280
175
140
170
-2
–
–
–
–
–
–
–
–
–
–
–
(3)
(3)
0.280
0.170
0.280
0.170
0.280
0.170
0.110
0.060
0.110
0.060
Max
323
323
323
258
323
258
162
129
157
323
258
323
258
162
129
157
300
-1
–
–
Units
Units
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
ps
ps
ps
UI
UI
UI
UI
UI
UI
UI
UI
UI
UI
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