STM32F205RGT6 STMicroelectronics, STM32F205RGT6 Datasheet - Page 95
![no-image](/images/manufacturer_photos/0/6/637/stmicroelectronics_sml.jpg)
STM32F205RGT6
Manufacturer Part Number
STM32F205RGT6
Description
MCU ARM 1024KB FLASH 64LQFP
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet
1.STM32F205RBT6.pdf
(163 pages)
Specifications of STM32F205RGT6
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
120MHz
Connectivity
CAN, I²C, IrDA, LIN, MMC, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
51
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
132K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 16x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LFQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-11157
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STM32F205RGT6
Manufacturer:
STMicroelectronics
Quantity:
500
Company:
Part Number:
STM32F205RGT6
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
STM32F205RGT6
Manufacturer:
ST
Quantity:
20 000
Company:
Part Number:
STM32F205RGT6TR
Manufacturer:
STMicroelectronics
Quantity:
10 000
STM32F205xx, STM32F207xx
5.3.17
NRST pin characteristics
The NRST pin input driver uses CMOS technology. It is connected to a permanent pull-up
resistor, R
Unless otherwise specified, the parameters given in
performed under the ambient temperature and V
in
Table 44.
1. Guaranteed by design, not tested in production.
2. The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution
Figure 37. Recommended NRST pin protection
2. The reset network protects the device against parasitic resets.
3. The user must ensure that the level on the NRST pin can go below the V
V
V
V
T
V
V
Table
NF(NRST)
IH(NRST)
IL(NRST)
NRST_OUT
Symbol
F(NRST)
hys(NRST)
to the series resistance must be minimum
Table
R
PU
44. Otherwise the reset is not taken into account by the device.
10.
(1)
(1)
(1)
(1)
PU
NRST pin characteristics
(see
NRST Input low level voltage
NRST Input high level voltage
NRST Schmitt trigger voltage
hysteresis
Weak pull-up equivalent resistor
NRST Input filtered pulse
NRST Input not filtered pulse
Generated reset pulse duration
Table
41).
Parameter
Doc ID 15818 Rev 6
(~10% order)
(2)
.
Reset source
V
Conditions
DD
V
DD
Internal
IN
> 2.7 V
supply voltage conditions summarized
=
Table 44
V
SS
are derived from tests
IL(NRST)
–0.5
Min
300
30
20
2
-
-
Electrical characteristics
max level specified in
Typ
200
40
-
-
-
-
-
V
DD
Max
100
0.8
50
-
-
-
+0.5
95/163
Unit
mV
kΩ
ns
ns
µs
V