STM32F215VGT6 STMicroelectronics, STM32F215VGT6 Datasheet - Page 31

• Manufacturer Part Number: STM32F215VGT6
• Description: MCU ARM 1024KB FLASH 100LQFP
• Manufacturer: STMicroelectronics
• Series: STM32r

Specifications of STM32F215VGT6

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 120MHz
• Connectivity: CAN, I²C, IrDA, LIN, MMC, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 132K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 16x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LFQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 497-11181

STM32F215xx, STM32F217xx
2.2.37
2.2.38
2.2.39
Cryptographic acceleration
The STM32F215xx and STM32F217xx devices embed a cryptographic accelerator. This
cryprographic accelerator provides a set of hardware acceleration for the advanced
cryptographic algorithms usually needed to provide confidentiality, authentication, data
integrity and non repudiation when exchanging messages with a peer.
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GPIOs (general-purpose inputs/outputs)
Each of the GPIO pins can be configured by software as output (push-pull or open-drain,
with or without pull-up or pull-down), as input (floating, with or without pull-up or pull-down)
or as peripheral alternate function. Most of the GPIO pins are shared with digital or analog
alternate functions. All GPIOs are high-current-capable and have speed selection to better
manage internal noise, power consumption and electromagnetic emission.
The I/O alternate function configuration can be locked if needed by following a specific
sequence in order to avoid spurious writing to the I/Os registers.
To provide fast I/O handling, the GPIOs are on the fast AHB1 bus with a clock up to
120 MHz that leads to a maximum I/O toggling speed of 60 MHz.
ADCs (analog-to-digital converters)
Three 12-bit analog-to-digital converters are embedded and each ADC shares up to 16
external channels, performing conversions in the single-shot or scan mode. In scan mode,
automatic conversion is performed on a selected group of analog inputs.
Additional logic functions embedded in the ADC interface allow:
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The ADC can be served by the DMA controller. An analog watchdog feature allows very
precise monitoring of the converted voltage of one, some or all selected channels. An
interrupt is generated when the converted voltage is outside the programmed thresholds.
The events generated by the timers TIM1, TIM2, TIM3, TIM4, TIM5 and TIM8 can be
internally connected to the ADC start trigger and injection trigger, respectively, to allow the
application to synchronize A/D conversion and timers.
These algorithms consists of:
Encryption/Decryption
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Universal hash
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It also provides a true random number generator that deliver 32-bit random numbers
produced by an integrated analog circuit.
Simultaneous sample and hold
Interleaved sample and hold
DES/TDES (data encryption standard/triple data encryption standard): ECB
(electronic codebook) and CBC (cipher block chaining) chaining algorithms, 64-,
128- or 192-bit key
AES (advanced encryption standard): ECB, CBC and CTR (counter mode)
chaining algorithms, 128, 192 or 256-bit key
SHA-1 (secure hash algorithm)
MD5
Doc ID 17050 Rev 4
Description
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