STM32F207IGT6 STMicroelectronics, STM32F207IGT6 Datasheet - Page 103

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STM32F207IGT6

Manufacturer Part Number
STM32F207IGT6
Description
MCU ARM 1024KB FLASH 176LQFP
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet

Specifications of STM32F207IGT6

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
120MHz
Connectivity
CAN, Ethernet, I²C, IrDA, LIN, MMC, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
140
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
132K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 24x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
176-LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-11169

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0
STM32F205xx, STM32F207xx
Table 50.
1. TBD stands for “to be defined”.
2. Based on design simulation and/or characterization results, not tested in production.
3. Depends on f
f
1/t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
CK
r(CK)
f(CK)
v(WS)
h(WS)
su(WS)
h(WS)
w(CKH)
w(CKL)
su(SD_MR)
su(SD_SR)
h(SD_MR)
h(SD_SR)
h(SD_MR)
h(SD_SR)
v(SD_ST)
h(SD_ST)
v(SD_MT)
h(SD_MT)
c(CK)
Symbol
(2)
(2)
(2)
(2)
(2)
(2)
(2)(3)
(2)(3)
(2)
(2)(3)
(2)
(2)(3)
(2)
(2)
(2)
(2)
I
2
PCLK
S characteristics
I
I
WS valid time
WS hold time
WS setup time
WS hold time
CK high and low time
Data input setup time
Data input hold time
Data input hold time
Data output valid time
Data output hold time
Data output valid time
Data output hold time
2
2
S clock frequency
S clock rise and fall time
. For example, if f
Parameter
Doc ID 15818 Rev 6
PCLK
(1)
=8 MHz, then T
Master
Slave
capacitive load
C
Master
Master
Slave
Slave
Master f
presc = TBD
Master receiver
Slave receiver
Master receiver
Slave receiver
Master f
Slave f
Slave transmitter
(after enable edge)
f
Slave transmitter
(after enable edge)
Master transmitter
(after enable edge)
f
Master transmitter
(after enable edge)
PCLK
PCLK
L
= 50 pF
Conditions
= TBD
= TBD
PCLK
PCLK
PCLK
PCLK
= 1/f
= TBD
= TBD,
= TBD
PLCLK
=125 ns.
Electrical characteristics
TBD
TBD
TBD
TBD
TBD
TBD
TBD
Min
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
0
-
-
-
-
Max
TBD
TBD
TBD
TBD
TBD
TBD
TBD
-
-
-
-
-
-
-
-
-
-
103/163
MHz
Unit
ns

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