ICS557GI-08LF IDT, Integrated Device Technology Inc, ICS557GI-08LF Datasheet - Page 8
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ICS557GI-08LF
Manufacturer Part Number
ICS557GI-08LF
Description
IC MUX 2:1 PCI-EXPRESS 16-TSSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Multiplexerr
Datasheet
1.ICS557G-08LF.pdf
(12 pages)
Specifications of ICS557GI-08LF
Input
HCSL, LVDS
Output
HCSL, LVDS
Frequency - Max
200MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP
Frequency-max
200MHz
Number Of Clock Inputs
2
Mode Of Operation
Differential
Output Frequency
200MHz
Output Logic Level
HCSL/LVDS
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.465V
Package Type
TSSOP
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Signal Type
HCSL/LVDS
Mounting
Surface Mount
Pin Count
16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
557GI-08LF
800-1069
800-1069-5
800-1069
800-1069
800-1069-5
800-1069
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ICS557GI-08LF
Manufacturer:
IDT
Quantity:
234
AC Electrical Characteristics
Unless stated otherwise, VDD=3.3 V ±5%, Ambient Temperature -40 to +85° C
IDT® 2:1 MULTIPLEXER CHIP FOR PCI-EXPRESS
Operating Frequency
Input High Voltage
Input Low Voltage
Differential Input
Voltages
Input Offset Voltage
Output High Voltage
Output Low Voltage
Crossing Point
Voltage
Crossing Point
Voltage
Rise Time
Fall Time
Rise/Fall Time
Variation
Duty Cycle
Output Enable Time
Output Disable Time
Stabilization Time
Input to Output Delay
ICS557-08
2:1 MULTIPLEXER CHIP FOR PCI-EXPRESS
Parameter
1
2
3
4
5
unless its PD = low.
1,2
1,2,4
Test setup is R
Measurement taken from a single-ended waveform.
Measurement taken from a differential waveform.
Measured at the crossing point where instantaneous voltages of both CLK and CLK are equal.
CLK and CLK pins are tri-stated when OE is Low asserted. CLK and CLK are driven differential when OE is High
1,2
1,2
1,2
1,3
1,2
1,2
1,2
1,2
5
5
L
=50 ohms with 2 pF, Rr = 475Ω (1%).
Symbol
t
STABLE
| V
(V
V
V
V
t
V
t
OR
OF
OH
OL
IH
ID
IL
IS
)
|
HCSL termination
LVDS termination
HCSL
HCSL
LVDS
LVDS
HCSL
HCSL
Absolute
Variation over all edges
From 0.175 V to 0.525 V
From 0.525 V to 0.175 V
All outputs
All outputs
From power-up VDD=3.3 V
Input differential clock to output
differential clock delay measured at
crossing point of input levels to
crossing point of output levels
Conditions
8
1.125
Min.
-150
-150
660
250
660
250
175
175
45
2
Typ.
1.25
700
350
700
350
332
344
3.0
10
10
0
0
4
ICS557-08
Max.
1.375
200
100
850
450
850
550
140
700
700
125
PCIE MULTIPLEXER
27
55
6
Units
MHz
MHz
mV
mV
mV
mV
mV
mV
mV
ms
REV J 121510
ps
ps
ps
ns
μs
μs
%
V