IDT5P61006PGGI8 IDT, Integrated Device Technology Inc, IDT5P61006PGGI8 Datasheet - Page 3

• Manufacturer Part Number: IDT5P61006PGGI8
• Description: IC BUFFER ZD DDR2/800 8-TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Zero Delay Bufferr

Specifications of IDT5P61006PGGI8

• Input: Clock
• Output: Clock
• Frequency - Max: 425MHz
• Voltage - Supply: 1.7 V ~ 1.9 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-TSSOP
• Frequency-max: 425MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 5P61006PGGI8

External Components
The IDT5P61006 requires a minimum number of external
components for proper operation.
Decoupling Capacitor
Decoupling capacitors of 4.7 µF, 0.1 µF and 2200 pF must
be connected between VDD (pins 5, 8) and GND (pins 1, 4),
as close to these pins as possible. For optimum device
performance, the decoupling capacitor should be mounted
on the component side of the PCB. Avoid the use of vias in
the decoupling circuit.
Absolute Maximum Ratings
Recommended Operation Conditions
IDT® 1.8 VOLT DDR2/800 ZERO DELAY BUFFER
IDT5P61006
1.8 VOLT DDR2/800 ZERO DELAY BUFFER
Stresses above the ratings listed below can cause permanent damage to the IDT5P61006. These ratings, which
are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at
these or any other conditions above those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical
parameters are guaranteed only over the recommended operating temperature range.
Supply Voltage, VDD
All Inputs and Outputs
Storage Temperature
Junction Temperature
Soldering Temperature
Parameter
Ambient Operating Temperature
Power Supply Voltage (measured with respect to GND)
Item
3
PCB Layout Recommendations
For optimum device performance and lowest output phase
noise, the following guidelines should be observed.
1) The 4.7 µF, 0.1 µF and 2200 pF decoupling capacitors
should be mounted on the component side of the board as
close to the VDD pin as possible. No vias should be used
between decoupling capacitor and VDD pin. The PCB trace
to VDD pin should be kept as short as possible, as should
the PCB trace to the ground via.
2) An optimum layout is one with all components on the
same side of the board, minimizing vias through other signal
layers. Other signal traces should be routed away from the
IDT5P61006. This includes signal traces just underneath
the device, or on layers adjacent to the ground plane layer
used by the device.
Min.
+1.7
2.5 V
-0.5 V to VDD+0.5 V
-65 to +150 C
125 C
260 C
-40
Typ.
+1.8
Rating
Max.
+1.9
+85
IDT5P61006
DIFFERENTIAL ZDB
Units
V
C
REV B 102010