ICS9161A-01CW16T IDT, Integrated Device Technology Inc, ICS9161A-01CW16T Datasheet - Page 6

• Manufacturer Part Number: ICS9161A-01CW16T
• Description: IC FREQUENCY GENERATOR 16-SOIC
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Frequency Generatorr

Specifications of ICS9161A-01CW16T

• Input: Clock, Crystal
• Output: Clock
• Frequency - Max: 120MHz
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC
• Frequency-max: 120MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 9161A-01CW16T

Where the least significant bit is the last bit of M and the
most significant bit is the first bit of I.
The serial data register is exactly 24 bits long, enough to
accept the data being sent. The stop bit acts as a load
command that passes the contents of the Serial Data
Register into the register indicated by the three address
bits. If a stop bit is not received after the serial register is
full, and more data is sent, all data in the register is ignored
and an error issued. If correct data is received, then the
unlocking mechanism re-arms, all data in the serial data
register is ignored, and an error is issued.
ERROUT# Operation
Any error in programming the ICS9161A is signaled by
ERROUT#. When the pin goes low, an error has been
detected. It stays low until the next unlock sequence. The
signal is invoked for any of the following errors: incorrect
start bit, incorrect data encoding, incorrect length of data
word, and incorrect stop bit.
Programming the ICS9161A
The ICS9161A has a wide operating range, but it is
recommended that it is operated within the following limits:
4.75V< V
1 MHz <F
200 kHz <F
50 MHz < F
F
The frequency of the programmable oscillator FVCO is
determined by the following fields:
0210I—03/21/05
n I
N
M
M
CLK
d
u
c
c
x e
x
o
o
≤ 120 MHz
u
(
u
R
t n
) I (
t n
)
r e
r e
DD
REF
a v
a v
REF/M
VCO
F
<5.25V
u l
u l
e i
<60 MHz
e
e
d l
(
<120 MHz
(
N
M
<5 MHz
) '
) '
V
F
Frequency
M=Reference divide 3
to 129
F
frequency
F
REF
VCO
CLK
DD
supply voltage
=output frequency
=Input Reference
=VCO output
#
f o
4
7
3
7
B
s t i
6
When the index field is set to 1111, VCLK is turned off and
both channels run from the same MCLK VCO. This is done
in an effort to reduce jitter, which may increase when
VCOs run at 2
have to be multiples of one another, it is best to mux MCLK
over to the output of the VCLK VCO and to power-down the
VCLK VCO. The multiplexed frequency will be divided
down by the correct divisor (M) and output on VCLK.
The equations used to determine the oscillator frequency
a
The value of F
MHz. As a result, for output frequencies below 50 MHz,
F
output divisor is selected by setting the values of the Mux
Field (R) as follows:
Unlike the ICD2061A, the ICS9161A’s VCO does not
require tuning to place it in certain ranges. The ICS9161A’s
VCO will operate from 50 MHz to 120 MHz without
adjusting the VCO gain. However, to maintain compatibility,
the I bits are programmed as in the ICD2061A.
These bits are dummy bits except for the following two
cases:
VCO
and prescale=2 or 4, as set in the control register
(Where N is the VCO divider & M is the reference
must be brought into range. To achieve this, an
1
1
1
1
I
1
1
0
where 3 ≤ M ≤ 129 and 4 ≤ N ≤ 130
1
F
n
VCO
0
0
1
1
0
0
1
1
VCO
multiples of one another. If the two outputs
R
0
1
0
1
0
1
M
0
1
0
0
0
0
1
1
1
1
u
must remain between 50 MHz and 120
u T
x
N=N’ + 3 M=M’ + 2
r
=Prescale • N/M • F
V
M
n r
Output Divisor
Index Field (I)
C
C
L
o
L
K
f f
K
divider)
F
V
o t
V
C
C
L
V
O
K
L
C
K
ICS9161A
e
5
5
D
0
0
M
v i
1
REF
6
1
3
2
4
8
2
1
s i
C
-
-
6
2
4
8
1
1
r o
L
2
2
K
0
0
F
M
M
V
C
H
H
O
z
z
: