ICS9248BF-96 IDT, Integrated Device Technology Inc, ICS9248BF-96 Datasheet - Page 2

• Manufacturer Part Number: ICS9248BF-96
• Description: IC FREQ GENERATOR/BUFFER 48-SSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Frequency Generatorr

Specifications of ICS9248BF-96

• Input: Crystal
• Output: Clock
• Frequency - Max: 166.5MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-SSOP
• Frequency-max: 166.5MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 9248BF-96

General Description
ICS9248-96 is the single chip clock solution for designs
using the 810/810E style chipset. It provides all necessary
clock signals for such a system.
Spread spectrum may be enabled through I
programming.
Spread spectrum typically reduces system EMI by 8dB to
10dB. This simplifies EMI qualification without resorting
to board design iterations or costly shielding. The ICS9248-
96 employs a proprietary closed loop design, which tightly
controls the percentage of spreading over process and
temperature variations.
Serial programming I
stop clock programming and frequency selection.
Pin Configuration
0311D—04/23/04
32, 33, 35, 36, 37,
20, 19, 17, 16, 15
ICS9248-96
2, 9, 10, 18, 25,
5, 6, 14, 21, 29,
PIN NUMBER
39, 40, 41,
44, 45
30, 38
34, 42
8, 7
11
12
13
26
27
28
31
43
46
47
48
22
23
24
1
3
4
SEL24_48MHz#
FREQ_IOAPIC
CPUCLK [1:0]
PCICLK [7:3]
SDRAM [7:0]
24_48MHz
GNDLCPU
VDDLAPIC
PIN NAME
SDRAM_F
VDDLCPU
3V66 [1:0]
48MHz_0
48MHz_1
PCICLK0
PCICLK1
PCICLK2
SDATA
IOAPIC
2
SCLK
REF0
VDD
GND
PD#
FS0
FS1
FS3
FS2
C interface allows changing functions,
X1
X2
TYPE
PWR
PWR
PWR
PWR
PWR
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
If FREQ_APIC = 0, APIC Clock = PCICLK
If FREQ_APIC = 1, APIC Clock = PCICLK/2 (default)
14.318 MHz reference clock.
3.3V Power supply for SDRAM output buffers, PCI output buffers,
reference output buffers and 48MHz output
Crystal input,nominally 14.318MHz.
Crystal output, nominally 14.318MHz.
Ground pin for 3V outputs.
3.3V Clocks
Frequency select pin.
PCI clock output
Frequency select pin.
PCI clock output
Logic inputs frequency select I/O/USB output,
When a "0" is latched, output frequency = 48MHz
When a "1" is latched, output frequency = 24MHz
PCI clock output
PCI clock outputs.
Asynchronous active low input pin used to power down the device
into a low power state. The internal clocks are disabled and the
VCO and the crystal are stopped. The latency of the power down will
not be greater than 3ms.
Clock input of I2C input, 5V tolerant input
Data input for I2C serial input, 5V tolerant input
Frequency select pin.
48MHz output clocks
48MHz output clocks
Frequency select pin.
24 or 48MHz output
Free running SDRAM - used for feed back to chipset, should remain
on always.
SDRAM clock outputs
Ground pin for the CPU clocks.
CPU clock outputs.
Power pin for the CPUCLKs. 2.5V
2.5V clock output
Power pin for the IOAPIC. 2.5V
2
C
2
Power Groups
GNDREF, VDDREF = REF0, X1, X2
GNDPCI , VDDPCI = PCICLK [9:0]
GNDSDR, VDDSDR = SDRAM [7:0], SDRAM_F,
supply for PLL core
GND3V66 , VDD3V66 = 3V66
GND48 , VDD48 = 48MHz, 24_48MHz,
VDDLAPIC = IOAPIC
GNDLCPU , VDDLCPU = CPUCLK [1:0]
DESCRIPTION