ICS9EMS9633BKLFT IDT, Integrated Device Technology Inc, ICS9EMS9633BKLFT Datasheet - Page 14

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ICS9EMS9633BKLFT

Manufacturer Part Number
ICS9EMS9633BKLFT
Description
IC EMBEDDED PC MAIN CLK 48VFQFPN
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of ICS9EMS9633BKLFT

Input
*
Output
*
Frequency - Max
*
Voltage - Supply
*
Operating Temperature
*
Mounting Type
Surface Mount
Package / Case
48-MLF
Frequency-max
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ICS9EMS9633BKLFT
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
IDT
ICS9EMS9633
ULTRA MOBILE PC CLOCK FOR EMBEDDED APPLICATIONS
Bit(s)
Bit(s)
Byte
Byte
TM
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
/ICS
TM
Ultra Mobile PC Clock for Embedded Applications
Pin #
Pin #
2
3
Output Enable Register
Output Control Register
CPU0 Stop Enable
CPU1 Stop Enable
CPU2 Stop Enable
LCD100 Enable
CPU0 Enable
CPU1 Enable
CPU2 Enable
SRC0 Enable
SRC1 Enable
SRC2 Enable
DOT Enable
REF Enable
REF Slew
Name
Name
is free-running or stoppable. If it is set to stoppable
is free-running or stoppable. If it is set to stoppable
is free-running or stoppable. If it is set to stoppable
These bits control the edge rate of the REF clock.
This bit controls whether the CPU[0] output buffer
This bit controls whether the CPU[1] output buffer
This bit controls whether the CPU[2] output buffer
This bit controls whether the SRC[0] output buffer
This bit controls whether the SRC[1] output buffer
This bit controls whether the SRC[2] output buffer
This bit controls whether the CPU[0] output buffer
This bit controls whether the CPU[1] output buffer
This bit controls whether the CPU[2] output buffer
This bit controls whether the DOT output buffer is
This bit controls whether the REF output buffer is
This bit controls whether the LCD output buffer is
the CPU[0] output buffer will be disabled with the
the CPU[1] output buffer will be disabled with the
the CPU[2] output buffer will be disabled with the
assertion of CPU_STP#.
assertion of CPU_STP#.
assertion of CPU_STP#.
is enabled or not.
is enabled or not.
is enabled or not.
is enabled or not.
is enabled or not.
is enabled or not.
enabled or not.
enabled or not.
enabled or not.
Description
Description
14
Reserved
Reserved
Type
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Free Running
Free Running
Free Running
0 = Disabled
0 = Disabled
0 = Disabled
0 = Disabled
0 = Disabled
0 = Disabled
0 = Disabled
0 = Disabled
0 = Disabled
01 = Medium Edge Rate
00 = Slow Edge Rate
10 = Fast Edge Rate
0
0
11 = Reserved
1 = Enabled
1 = Enabled
1 = Enabled
1 = Enabled
1 = Enabled
1 = Enabled
1 = Enabled
1 = Enabled
1 = Enabled
Stoppable
Stoppable
Stoppable
Datasheet
1
1
1617—08/19/09
Default
Default
10
1
1
1
1
1
1
1
1
0
0
1
0
0
0

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