ICS952001AF IDT, Integrated Device Technology Inc, ICS952001AF Datasheet - Page 11

• Manufacturer Part Number: ICS952001AF
• Description: IC TIMING CTRL HUB P4 48-SSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Timing Control Hubr

Specifications of ICS952001AF

• Input: Crystal
• Output: Clock
• Frequency - Max: 200MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-SSOP
• Frequency-max: 200MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 952001AF

Core Supply Voltage . . . . . . . . . . . . . . . . . . . . . . 4.6 V
I/O Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . 3.6V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND –0.5 V to V
Ambient Operating Temperature . . . . . . . . . . . . 0°C to +70°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Case Temperature . . . . . . . . . . . . . . . . . . . . . . . . 115°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are
stress specifications only and functional operation of the device at these or any other conditions above those listed in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect product reliability.
1
Third party brands and names are the property of their respective owners.
Absolute Maximum Ratings
T
Electrical Characteristics - Input/Supply/Common Output Parameters
Guaranteed by design, not 100% tested in production.
Input Capacitance
Input High Voltage
Input High Current
A
Input Low Voltage
Input Low Current
Input Low Current
Clk Stabilization
Transition Time
Input frequency
= 0 - 70C; Supply Voltage V
Supply Current
Supply Current
Pin Inductance
PARAMETER
Settling Time
Power Down
Operating
Delay
Integrated
Circuit
Systems, Inc.
1
1
1
1
SYMBOL
t
t
I
I
PZH
PLZ
DD3.3O P
DD3.3PD
T
T
C
C
L
C
V
V
I
I
STAB
I
trans
T
F
IL1
IL2
,t
IH
pin
INX
,t
out
IH
IN
IL
s
i
PZH
PZH
DD
= 3.3 V +5%, VDDL=2.5 V+ 5%(unless otherwise stated)
V
V
V
C
C
V
Logic Inputs
Out put pin capacitance
X1 & X2 pins
To 1st crossing of target Freq.
From 1st crossing to 1% target Freq.
From V
output enable delay (all outputs)
output disable delay (all outputs)
IN
IN
IN
DD
L
L
= 30 pF; CPU @ 133 MHz
= 0 pF
= V
= 0 V; Inputs with no pull-up resistors
= 0 V; Inputs with pull-up resistors
= 3.3 V
DD
DD
= 3.3 V to 1% target Freq.
CONDITIONS
DD
+0.5 V
V
-200
MIN
SS
27
-5
-5
2
1
1
-0.3
14.32
TYP
V
DD
MAX
280
0.8
25
45
10
10
+0.3
5
7
5
6
3
3
3
UNITS
MHz
mA
mA
mA
mA
mA
mS
mS
mS
nH
pF
pF
pF
nS
nS
V
V