LMX2512LQ0967 National Semiconductor, LMX2512LQ0967 Datasheet - Page 13

• Manufacturer Part Number: LMX2512LQ0967
• Description: IC FREQ SYNTH W/INT VCO 28LLP
• Manufacturer: National Semiconductor
• Series: PLLatinum™r
• Type: Frequency Synthesizer (RF/IF), Korean CDMA, Cellularr

Specifications of LMX2512LQ0967

• Output: LVCMOS
• Frequency - Max: 979MHz
• Voltage - Supply: 2.7 V ~ 3.3 V
• Operating Temperature: -30°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-LLP
• Frequency-max: 979MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Input: -
• Other names: LMX2512LQ0967TR

Programming Description
R1 REGISTER
The R1 register address bits (R1 [1:0]) are “01”.
The IF_FREQ bits selects the default IF frequency applicable to the specific CDMA system. For the LMX2502 the default IF
frequency is 440.76 MHz, and for the LMX2512 the default IF frequencies are 367.20 MHz and 170.76 MHz, depending on
variant.
Reference Frequency Selection bit (OSC_FREQ) selects either 19.20 MHz or 19.68 MHz for the reference oscillator frequency.
The internal spurious reduction scheme is controlled by the SPUR_RDT [1:0] bits. There are two different spur reduction
schemes: a continuous tracking mode and a single optimization mode. The continuous tracking mode will adjust for variations in
voltage and temperature. The single optimization mode fixes the internal compensation parameters only when the PLL goes into
the locked state. The spur reduction can also be disabled, but it is recommended that the continuous mode be used for normal
operation.
The OB_CRL [1:0] bits determine the power level of the RF output buffer. The power level can be set according to the system
requirement.
The two bits, RF_EN and IF_EN, logically select the active state of the RF synthesizer system and the IF PLL, respectively. The
entire IC can be placed in a power down state by using the CE control pin (pin 20).
R1
(Default)
MSB
23
IF_
FREQ
[1:0]
Name
IF_FREQ [1:0]
OSC_FREQ
SPUR_RDT [1:0]
OB_CRL [1:0]
RF_EN
IF_EN
22 21
OSC_
FREQ
20 19 18 17 16 15 14 13 12
1
0
0
(Continued)
0
0
SHIFT REGISTER BIT LOCATION
0
R1 REGISTER
Data Field
Functions
IF Frequency Selection
00 = 170.76 MHz (LMX2512LQ0967)
01 = 367.20 MHz (LMX2512LQ1065)
10 = 440.76 MHz (LMX2502LQ1635)
Reference Frequency Selection
0 = 19.20 MHz
1 = 19.68 MHz
Spur Reduction Scheme
00 = No spur reduction
01 = Not Used
10 = Continuous tracking of variation (Recommended)
11 = One time optimization
RF Output Power Control
00 = Minimum Output Power
01 =
10 =
11 = Maximum Output Power
RF Enable
0 = RF Off
1 = RF On
IF Enable
0 = IF Off
1 = IF On
0
13
0
SPUR_
RDT
[1:0]
11
10 9 8 7 6 5
0
0 1 0 1 OB_
CRL
[1:0]
4
3
RF_
EN
2
IF_
EN
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1
0
Address
Field
LSB
0
1