SI5365-C-GQR Silicon Laboratories Inc, SI5365-C-GQR Datasheet

SI5365-C-GQR

Manufacturer Part Number

SI5365-C-GQR

Description

IC CLOCK MULTIPLIER PROG 100TQFP

Manufacturer

Silicon Laboratories Inc

Datasheet

1.SI5365-C-GQR.pdf (28 pages)

Specifications of SI5365-C-GQR

Input

Output

Frequency - Max

Voltage - Supply

Operating Temperature

Mounting Type

Surface Mount

Package / Case

100-TQFP, 100-VQFP

Frequency-max

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

BOSTOCK HK LIMITED

Part Number:

SI5365-C-GQR

Manufacturer:

Silicon Laboratories Inc

Quantity:

10 000

Current page: 1 of 28
Download datasheet (266Kb)

Features



Applications



Description

The Si5365 is a low-jitter, precision clock multiplier for high-speed

communication systems, including SONET OC-48/OC-192, Ethernet, and

Fibre Channel, in which the application requires clock multiplication

without jitter attenuation. The Si5365 accepts four clock inputs ranging

from 19.44 to 707 MHz and generates five frequency-multiplied clock

outputs ranging from 19.44 to 1050 MHz. The input clock frequency and

clock multiplication ratio are selectable from a table of popular SONET,

Ethernet, and Fibre Channel frequencies. The Si5365 is based on Silicon

Laboratories' 3rd-generation DSPLL

frequency synthesis in a highly integrated PLL solution that eliminates the

need for external VCXO and loop filter components. The DSPLL loop

bandwidth is digitally programmable, providing jitter performance

optimization at the application level. Operating from a single 1.8, 2.5, or

3.3 V supply, the Si5365 is ideal for providing clock multiplication in high

performance timing applications.

Rev. 0.5 2/12

I N

Not recommended for new

designs. For alternatives, see the

Si533x family of products.

Selectable output frequencies

ranging from 19.44 to 1050 MHz

Low jitter clock outputs w/jitter

generation as low as 0.6 ps rms

(50 kHz–80 MHz)

Integrated loop filter with

selectable loop bandwidth

(150 kHz to 1.3 MHz)

Four clock inputs w/manual or

automatically controlled

switching

SONET/SDH OC-48/STM-16

and STM-64/OC-192 line cards

GbE/10GbE, 1/2/4/8/10GFC line

cards

- P

ROGRAMMABLE



technology, which provides any-

Five clock outputs with selectable

signal format (LVPECL, LVDS,

CML, CMOS)

Support for ITU G.709 FEC ratios

(255/238, 255/237, 255/236)

LOS alarm outputs

Pin-programmable settings

On-chip voltage regulator for

1.8 ±5%, 2.5 V ±10%, or

3.3 V ±10% operation

Small size: 14 x 14 mm 100-pin

TQFP

Pb-free, RoHS compliant

ITU G.709 line cards

Test and measurement

R E C I S I O N

LOCK

Ordering Information:

U LT IP L I E R

See page 21.

Si5365

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