ADN2811ACP-CML Analog Devices Inc, ADN2811ACP-CML Datasheet - Page 4
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ADN2811ACP-CML
Manufacturer Part Number
ADN2811ACP-CML
Description
IC RECOVER CLOCK/DATA 48-LFCSP
Manufacturer
Analog Devices Inc
Type
Clock and Data Recovery (CDR)r
Datasheet
1.ADN2811ACPZ-CML.pdf
(20 pages)
Specifications of ADN2811ACP-CML
Rohs Status
RoHS non-compliant
Output
CML
Frequency - Max
2.7GHz
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-LFCSP
Frequency-max
2.7GHz
Input
-
ADN2811
Parameter
REFCLK DC INPUT CHARACTERISTICS
TEST DATA DC INPUT CHARACTERISTICS
LVTTL DC INPUT CHARACTERISTICS
LVTTL DC OUTPUT CHARACTERISTICS
1
2
3
4
PIN and NIN should be differentially driven, ac-coupled for optimum sensitivity.
PWD measurement made on quantizer outputs in Bypass mode.
Measurement is equipment limited.
TDINP/N are CML inputs. If the drivers to the TDINP/N inputs are anything other than CML, they must be ac-coupled.
Setup Time
Hold Time
Input Voltage Range
Peak-to-Peak Differential Input
Common-Mode Level
Peak-to-Peak Differential Input Voltage
Input High Voltage
Input Low Voltage
Input Current
Output High Voltage
Output Low Voltage
4
(TDINP/N)
Conditions
T
T
@ REFCLKP or REFCLKN
DC-Coupled, Single-Ended
CML Inputs
V
V
V
V
V
S
H
IH
IL
IN
OH
OL
(See Figure 3) OC-48
(See Figure 3) OC-48
, I
= 0.4 V or V
, I
OL
OH
Rev. B | Page 4 of 20
= +2.0 mA
= −2.0 mA
IN
= 2.4 V
Min
140
150
0
100
2.0
−5
2.4
Typ
0.8
VCC/2
Max
VCC
0.8
+5
0.4
Unit
ps
ps
V
mV
V
V
V
V
µA
V
V